Searched refs:cycles (Results 1 - 25 of 39) sorted by relevance

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/xsrc/external/mit/xf86dga/dist/
H A Ddga.c168 int cycles; local in function:main
180 cycles=0;
183 cycles++;
184 memset(addr, (char) (cycles % 255), size * 1024);
191 (size * 1000 * cycles) / diff_clock);
200 cycles=0;
203 cycles++;
211 (size * 1000 * cycles) / diff_clock);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/llvmpipe/
H A Dlp_test_conv.c66 double cycles,
71 fprintf(fp, "%.1f\t", cycles / MAX2(src_type.length, dst_type.length));
164 int64_t cycles[LP_TEST_NUM_SAMPLES]; local in function:test_one
258 cycles[i] = end_counter - start_counter;
311 sum += cycles[i];
312 sum2 += cycles[i]*cycles[i];
321 if(fabs(cycles[i] - avg) <= 4.0*std) {
322 sum += cycles[i];
63 write_tsv_row(FILE * fp,struct lp_type src_type,struct lp_type dst_type,double cycles,boolean success) argument
H A Dlp_test_blend.c77 double cycles,
82 fprintf(fp, "%.1f\t", cycles / type.length);
446 int64_t cycles[LP_TEST_NUM_SAMPLES]; local in function:test_one
507 cycles[i] = end_counter - start_counter;
560 sum += cycles[i];
561 sum2 += cycles[i]*cycles[i];
570 if(fabs(cycles[i] - avg) <= 4.0*std) {
571 sum += cycles[i];
74 write_tsv_row(FILE * fp,const struct pipe_blend_state * blend,struct lp_type type,double cycles,boolean success) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/llvmpipe/
H A Dlp_test_conv.c66 double cycles,
71 fprintf(fp, "%.1f\t", cycles / MAX2(src_type.length, dst_type.length));
164 int64_t cycles[LP_TEST_NUM_SAMPLES]; local in function:test_one
258 cycles[i] = end_counter - start_counter;
311 sum += cycles[i];
312 sum2 += cycles[i]*cycles[i];
321 if(fabs(cycles[i] - avg) <= 4.0*std) {
322 sum += cycles[i];
63 write_tsv_row(FILE * fp,struct lp_type src_type,struct lp_type dst_type,double cycles,boolean success) argument
H A Dlp_test_blend.c77 double cycles,
82 fprintf(fp, "%.1f\t", cycles / type.length);
446 int64_t cycles[LP_TEST_NUM_SAMPLES]; local in function:test_one
507 cycles[i] = end_counter - start_counter;
560 sum += cycles[i];
561 sum2 += cycles[i]*cycles[i];
570 if(fabs(cycles[i] - avg) <= 4.0*std) {
571 sum += cycles[i];
74 write_tsv_row(FILE * fp,const struct pipe_blend_state * blend,struct lp_type type,double cycles,boolean success) argument
/xsrc/external/mit/MesaLib.old/dist/src/mesa/math/
H A Dm_debug_norm.c197 static int test_norm_function( normal_func func, int mtype, long *cycles ) argument
210 (void) cycles;
286 BEGIN_RACE( *cycles );
288 END_RACE( *cycles );
350 printf( "counter overhead: %ld cycles\n\n", counter_overhead );
360 long *cycles = &benchmark_tab[mtype]; local in function:_math_test_all_normal_transform_functions
362 if ( test_norm_function( func, mtype, cycles ) == 0 ) {
H A Dm_debug_xform.c48 /* Overhead of profiling counter in cycles. Automatically adjusted to
169 int mtype, unsigned long *cycles )
179 (void) cycles;
246 BEGIN_RACE( *cycles );
248 END_RACE( *cycles );
295 printf("counter overhead: %lu cycles\n\n", counter_overhead );
314 unsigned long *cycles = &(benchmark_tab[psize-1][mtype]); local in function:_math_test_all_transform_functions
316 if ( test_transform_function( func, psize, mtype, cycles ) == 0 ) {
168 test_transform_function(transform_func func,int psize,int mtype,unsigned long * cycles) argument
H A Dm_debug_clip.c230 int psize, long *cycles )
241 (void) cycles;
282 BEGIN_RACE( *cycles );
284 END_RACE( *cycles );
365 printf( "counter overhead: %ld cycles\n\n", counter_overhead );
384 long *cycles = &(benchmark_tab[np][psize-1]); local in function:_math_test_all_cliptest_functions
386 if ( test_cliptest_function( func, np, psize, cycles ) == 0 ) {
229 test_cliptest_function(clip_func func,int np,int psize,long * cycles) argument
/xsrc/external/mit/MesaLib/dist/src/mesa/math/
H A Dm_debug_norm.c196 static int test_norm_function( normal_func func, int mtype, long *cycles ) argument
209 (void) cycles;
285 BEGIN_RACE( *cycles );
287 END_RACE( *cycles );
349 printf( "counter overhead: %ld cycles\n\n", counter_overhead );
359 long *cycles = &benchmark_tab[mtype]; local in function:_math_test_all_normal_transform_functions
361 if ( test_norm_function( func, mtype, cycles ) == 0 ) {
H A Dm_debug_xform.c47 /* Overhead of profiling counter in cycles. Automatically adjusted to
168 int mtype, unsigned long *cycles )
178 (void) cycles;
245 BEGIN_RACE( *cycles );
247 END_RACE( *cycles );
294 printf("counter overhead: %lu cycles\n\n", counter_overhead );
313 unsigned long *cycles = &(benchmark_tab[psize-1][mtype]); local in function:_math_test_all_transform_functions
315 if ( test_transform_function( func, psize, mtype, cycles ) == 0 ) {
167 test_transform_function(transform_func func,int psize,int mtype,unsigned long * cycles) argument
H A Dm_debug_clip.c230 int psize, long *cycles )
241 (void) cycles;
282 BEGIN_RACE( *cycles );
284 END_RACE( *cycles );
365 printf( "counter overhead: %ld cycles\n\n", counter_overhead );
384 long *cycles = &(benchmark_tab[np][psize-1]); local in function:_math_test_all_cliptest_functions
386 if ( test_cliptest_function( func, np, psize, cycles ) == 0 ) {
229 test_cliptest_function(clip_func func,int np,int psize,long * cycles) argument
/xsrc/external/mit/xf86-input-keyboard/dist/src/
H A Dsun_kbd.c334 int cycles; local in function:SoundKbdBell
342 cycles = UINT16_MAX;
344 cycles = 0;
346 cycles = (PIT_HZ + pitch / 2) / pitch;
347 if (cycles > UINT16_MAX)
348 cycles = UINT16_MAX;
351 mktonevalue = cycles | (((duration * loudness * 20) / 1000) << 16);
/xsrc/external/mit/xinit/dist/
H A Dxinit.c332 int ncycles = 120; /* # of cycles to wait */
333 int cycles; /* Wait cycle count */ local in function:waitforserver
345 for (cycles = 0; cycles < ncycles; cycles++) {
/xsrc/external/mit/xorg-server.old/dist/hw/xwin/xlaunch/
H A Dmain.cc476 int ncycles = 120; /* # of cycles to wait */
477 int cycles; /* Wait cycle count */ local in function:CMyWizard::WaitForServer
480 for (cycles = 0; cycles < ncycles; cycles++) {
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c51 /* Longest cycles + instruction_latency() of any parent of this node. */
55 * Minimum number of cycles from scheduling this instruction until the
62 * cycles between this instruction being scheduled and when its result
1021 uint32_t cycles = schedule_instructions(c, scoreboard, block, local in function:qpu_schedule_instructions_block
1030 return cycles;
1107 uint32_t cycles = 0; local in function:qpu_schedule_instructions
1112 cycles += qpu_schedule_instructions_block(c,
1132 return cycles;
H A Dvc4_qpu_emit.c628 uint32_t cycles = qpu_schedule_instructions(c); local in function:vc4_generate_code
680 cycles += c->qpu_inst_count - inst_count_at_schedule_time;
683 fprintf(stderr, "SHADER-DB: %s prog %d/%d: %d estimated cycles\n",
686 cycles);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c51 /* Longest cycles + instruction_latency() of any parent of this node. */
55 * Minimum number of cycles from scheduling this instruction until the
62 * cycles between this instruction being scheduled and when its result
1021 uint32_t cycles = schedule_instructions(c, scoreboard, block, local in function:qpu_schedule_instructions_block
1030 return cycles;
1107 uint32_t cycles = 0; local in function:qpu_schedule_instructions
1112 cycles += qpu_schedule_instructions_block(c,
1132 return cycles;
H A Dvc4_qpu_emit.c628 uint32_t cycles = qpu_schedule_instructions(c); local in function:vc4_generate_code
680 cycles += c->qpu_inst_count - inst_count_at_schedule_time;
683 fprintf(stderr, "SHADER-DB: %s prog %d/%d: %d estimated cycles\n",
686 cycles);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/sparc/
H A Dnorm.S86 fsqrts %f6, %f6 ! FDIV 20 cycles
87 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
213 fsqrts %f6, %f6 ! FDIV 20 cycles
214 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
517 fsqrts %f6, %f6 ! FDIV 20 cycles
518 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
/xsrc/external/mit/MesaLib/dist/src/mesa/sparc/
H A Dnorm.S86 fsqrts %f6, %f6 ! FDIV 20 cycles
87 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
213 fsqrts %f6, %f6 ! FDIV 20 cycles
214 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
517 fsqrts %f6, %f6 ! FDIV 20 cycles
518 fdivs %f12, %f6, %f6 ! FDIV 14 cycles
/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_spill.c60 * block and used 6 cycles later will always have a next_use_distance of 11
88 unsigned cycles; member in struct:ra_spill_block_state
171 /* Compute the number of cycles per instruction used for next-use-distance
178 unsigned cycles = 0; local in function:instr_cycles
182 cycles += reg_elems(instr->srcs[i]);
186 return cycles;
190 unsigned cycles = 0; local in function:instr_cycles
194 cycles++;
198 return cycles;
215 unsigned cycle = state->cycles;
[all...]
H A Dir3_sched.c307 unsigned cycles = cycle_count(instr); local in function:schedule
317 ctx->sfu_delay -= MIN2(cycles, ctx->sfu_delay);
336 ctx->tex_delay -= MIN2(cycles, ctx->tex_delay);
557 * sfu_delay/tex_delay counters, ie. the more cycles it has been since
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dqpu_schedule.c51 /* Longest cycles + instruction_latency() of any parent of this node. */
55 * Minimum number of cycles from scheduling this instruction until the
62 * cycles between this instruction being scheduled and when its result
1364 uint32_t cycles = schedule_instructions(c, scoreboard, block, local in function:qpu_schedule_instructions_block
1372 return cycles;
1466 uint32_t cycles = 0; local in function:v3d_qpu_schedule_instructions
1472 cycles += qpu_schedule_instructions_block(c,
1491 return cycles;
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dqpu_schedule.c51 /* Longest cycles + instruction_latency() of any parent of this node. */
55 * Minimum number of cycles from scheduling this instruction until the
62 * cycles between this instruction being scheduled and when its result
2246 uint32_t cycles = schedule_instructions(c, scoreboard, block, local in function:qpu_schedule_instructions_block
2254 return cycles;
2399 uint32_t cycles = 0; local in function:v3d_qpu_schedule_instructions
2405 cycles += qpu_schedule_instructions_block(c,
2424 return cycles;
/xsrc/external/mit/MesaLib/dist/docs/
H A Dshading.rst60 (instructions, cycles, memory accesses, and so on).

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