Searched refs:dccRamBaseAlign (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/r800/
H A Dciaddrlib.cpp243 pOut->dccRamBaseAlign = pIn->tileInfo.banks *
249 ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign));
251 if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1)))
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/r800/
H A Dciaddrlib.cpp242 pOut->dccRamBaseAlign = pIn->tileInfo.banks *
248 ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign));
250 if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1)))
/xsrc/external/mit/MesaLib.old/dist/src/amd/common/
H A Dac_surface.c396 surf->dcc_alignment = MAX2(surf->dcc_alignment, AddrDccOut->dccRamBaseAlign);
1223 surf->dcc_alignment = dout.dccRamBaseAlign;
1282 surf->u.gfx9.display_dcc_alignment = dout.dccRamBaseAlign;
/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/inc/
H A Daddrinterface.h2248 UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key member in struct:_ADDR_COMPUTE_DCCINFO_OUTPUT
3289 UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key member in struct:_ADDR2_COMPUTE_DCCINFO_OUTPUT
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/inc/
H A Daddrinterface.h2293 UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key member in struct:_ADDR_COMPUTE_DCCINFO_OUTPUT
3403 UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key member in struct:_ADDR2_COMPUTE_DCCINFO_OUTPUT
/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/core/
H A Daddrlib2.cpp773 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
H A Daddrlib1.cpp1454 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/core/core/
H A Daddrlib2.cpp773 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
H A Daddrlib1.cpp1454 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/core/
H A Daddrlib2.cpp801 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
H A Daddrlib1.cpp1458 ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/gfx9/
H A Dgfx9addrlib.cpp572 pOut->dccRamBaseAlign = numPipeTotal * m_pipeInterleaveBytes;
573 pOut->dccRamSize = PowTwoAlign((pIn->dataSurfaceSize / 256), pOut->dccRamBaseAlign);
656 pOut->dccRamBaseAlign = Max(numCompressBlkPerMetaBlk, sizeAlign);
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/gfx9/
H A Dgfx9addrlib.cpp610 pOut->dccRamBaseAlign = numPipeTotal * m_pipeInterleaveBytes;
611 pOut->dccRamSize = PowTwoAlign((pIn->dataSurfaceSize / 256), pOut->dccRamBaseAlign);
694 pOut->dccRamBaseAlign = Max(numCompressBlkPerMetaBlk, sizeAlign);
/xsrc/external/mit/MesaLib/dist/src/amd/common/
H A Dac_surface.c695 surf->meta_alignment_log2 = MAX2(surf->meta_alignment_log2, util_logbase2(AddrDccOut->dccRamBaseAlign));
1845 surf->meta_alignment_log2 = util_logbase2(dout.dccRamBaseAlign);
1918 surf->u.gfx9.color.display_dcc_alignment_log2 = util_logbase2(dout.dccRamBaseAlign);
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/gfx10/
H A Dgfx10addrlib.cpp444 pOut->dccRamBaseAlign = metaBlkSize;

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