Searched refs:desc_offset (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_nir_apply_pipeline_layout.c55 uint8_t desc_offset; member in struct:apply_pipeline_layout_state::__anon4f1cbf490108
390 const uint32_t desc_offset = local in function:lower_res_index_intrinsic
392 (uint32_t)state->set[set].desc_offset << 8 |
400 index = nir_vec4(b, nir_imm_int(b, desc_offset),
409 index = nir_pack_64_2x32_split(b, nir_imm_int(b, desc_offset),
420 index = nir_imm_ivec2(b, state->set[set].desc_offset,
500 nir_ssa_def *desc_offset, *array_index; local in function:build_ssbo_descriptor_load
504 desc_offset = nir_channel(b, index, 0);
511 desc_offset = nir_unpack_64_2x32_split_x(b, index);
519 /* The desc_offset i
570 nir_ssa_def *desc_offset, *array_index; local in function:lower_load_vulkan_descriptor
695 nir_ssa_def *desc_offset = local in function:build_descriptor_load
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/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_nir_apply_pipeline_layout.c54 uint8_t desc_offset; member in struct:apply_pipeline_layout_state::__anon9cb7d21c0108
205 surface_index = state->set[set].desc_offset;
252 nir_ssa_def *desc_addr, unsigned desc_offset,
262 nir_iadd_imm(b, nir_channel(b, desc_addr, 3), desc_offset);
267 .align_offset = desc_offset % 8);
273 nir_iadd_imm(b, nir_channel(b, desc_addr, 1), desc_offset);
278 .align_offset = desc_offset % 8,
328 assert(state->set[set].desc_offset < MAX_BINDING_TABLE_SIZE);
329 set_idx = state->set[set].desc_offset;
355 uint32_t surface_index = state->set[set].desc_offset;
251 build_load_descriptor_mem(nir_builder * b,nir_ssa_def * desc_addr,unsigned desc_offset,unsigned num_components,unsigned bit_size,struct apply_pipeline_layout_state * state) argument
446 nir_ssa_def *desc_offset = res.desc_offset_base; local in function:build_desc_addr
577 build_load_var_deref_descriptor_mem(nir_builder * b,nir_deref_instr * deref,unsigned desc_offset,unsigned num_components,unsigned bit_size,struct apply_pipeline_layout_state * state) argument
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/xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/
H A Dtu_shader.c364 nir_ssa_def *desc_offset; local in function:build_bindless
374 desc_offset =
383 desc_offset = nir_iadd(b, desc_offset,
387 return nir_bindless_resource_ir3(b, 32, desc_offset, .desc_set = set);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_descriptors.c2181 unsigned desc_offset = si_get_image_slot(i) * 8; local in function:si_emit_compute_shader_pointers
2186 desc_offset += 4;
2190 radeon_emit_array(&desc->list[desc_offset], num_sgprs);

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