Searched refs:dest_mask (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h389 #define i915_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \
390 _i915_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2)
395 #define _i915_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \
401 (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \
402 (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \
509 #define i915_fs_mov_masked(dest_reg, dest_mask, operand0) \
510 i915_fs_arith_masked (MOV, dest_reg, dest_mask, \
535 #define i915_fs_rsq(dest_reg, dest_mask, operand0) \
537 if (dest_mask) { \
538 i915_fs_arith_masked (RSQ, dest_reg, dest_mask, \
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h389 #define i915_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \
390 _i915_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2)
395 #define _i915_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \
401 (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \
402 (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \
509 #define i915_fs_mov_masked(dest_reg, dest_mask, operand0) \
510 i915_fs_arith_masked (MOV, dest_reg, dest_mask, \
535 #define i915_fs_rsq(dest_reg, dest_mask, operand0) \
537 if (dest_mask) { \
538 i915_fs_arith_masked (RSQ, dest_reg, dest_mask, \
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/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_dead_code_eliminate.cpp89 uint8_t dest_mask = inst->dst.writemask; local in function:vec4_visitor::dead_code_eliminate
92 if (!result_live[c] && dest_mask & (1 << c))
93 dest_mask &= ~(1 << c);
99 if (inst->dst.writemask != (flag_mask | dest_mask)) {
101 inst->dst.writemask = flag_mask | dest_mask;
107 if (dest_mask == 0) {
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_dead_code_eliminate.cpp88 uint8_t dest_mask = inst->dst.writemask; local in function:vec4_visitor::dead_code_eliminate
91 if (!result_live[c] && dest_mask & (1 << c))
92 dest_mask &= ~(1 << c);
98 if (inst->dst.writemask != (flag_mask | dest_mask)) {
100 inst->dst.writemask = flag_mask | dest_mask;
106 if (dest_mask == 0) {
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h1236 #define gen3_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \
1237 _gen3_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2)
1242 #define _gen3_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \
1248 (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \
1249 (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \
1356 #define gen3_fs_mov_masked(dest_reg, dest_mask, operand0) \
1357 gen3_fs_arith_masked (MOV, dest_reg, dest_mask, \
1382 #define gen3_fs_rcp(dest_reg, dest_mask, operand0) \
1384 if (dest_mask) { \
1385 gen3_fs_arith_masked (RCP, dest_reg, dest_mask, \
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h1236 #define gen3_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \
1237 _gen3_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2)
1242 #define _gen3_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \
1248 (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \
1249 (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \
1356 #define gen3_fs_mov_masked(dest_reg, dest_mask, operand0) \
1357 gen3_fs_arith_masked (MOV, dest_reg, dest_mask, \
1382 #define gen3_fs_rcp(dest_reg, dest_mask, operand0) \
1384 if (dest_mask) { \
1385 gen3_fs_arith_masked (RCP, dest_reg, dest_mask, \
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/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_3d.h374 #define i915_fs_mov_masked(dest_reg, dest_mask, operand0) \
381 op.ui[0] |= ((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT; \
382 if ((dest_mask) & MASK_SATURATE) \
404 * resulting scalar in the channels of dest_reg specified by the dest_mask.
406 #define i915_fs_dp3_masked(dest_reg, dest_mask, operand0, operand1) \
413 op.ui[0] |= ((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT; \
414 if ((dest_mask) & MASK_SATURATE) \
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/pp/
H A Dliveness.c32 uint8_t *dest_mask, uint8_t *src_mask)
38 dest_mask[i] |= src_mask[i];
30 ppir_liveness_propagate(ppir_compiler * comp,BITSET_WORD * dest_set,BITSET_WORD * src_set,uint8_t * dest_mask,uint8_t * src_mask) argument
/xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/
H A Dtu_cmd_buffer.c1240 uint32_t dest_mask = 0; local in function:tu_bind_dynamic_state
1256 dest_mask |= TU_DYNAMIC_VIEWPORT;
1265 dest_mask |= TU_DYNAMIC_SCISSOR;
1272 dest_mask |= TU_DYNAMIC_LINE_WIDTH;
1280 dest_mask |= TU_DYNAMIC_DEPTH_BIAS;
1288 dest_mask |= TU_DYNAMIC_BLEND_CONSTANTS;
1296 dest_mask |= TU_DYNAMIC_DEPTH_BOUNDS;
1304 dest_mask |= TU_DYNAMIC_STENCIL_COMPARE_MASK;
1312 dest_mask |= TU_DYNAMIC_STENCIL_WRITE_MASK;
1320 dest_mask |
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/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c131 uint64_t dest_mask = 0; local in function:radv_bind_dynamic_state
139 dest_mask |= RADV_DYNAMIC_VIEWPORT;
146 dest_mask |= RADV_DYNAMIC_VIEWPORT;
153 dest_mask |= RADV_DYNAMIC_SCISSOR;
159 dest_mask |= RADV_DYNAMIC_SCISSOR;
166 dest_mask |= RADV_DYNAMIC_LINE_WIDTH;
173 dest_mask |= RADV_DYNAMIC_DEPTH_BIAS;
180 dest_mask |= RADV_DYNAMIC_BLEND_CONSTANTS;
187 dest_mask |= RADV_DYNAMIC_DEPTH_BOUNDS;
195 dest_mask |
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/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c100 uint32_t dest_mask = 0; local in function:radv_bind_dynamic_state
115 dest_mask |= RADV_DYNAMIC_VIEWPORT;
124 dest_mask |= RADV_DYNAMIC_SCISSOR;
131 dest_mask |= RADV_DYNAMIC_LINE_WIDTH;
139 dest_mask |= RADV_DYNAMIC_DEPTH_BIAS;
148 dest_mask |= RADV_DYNAMIC_BLEND_CONSTANTS;
156 dest_mask |= RADV_DYNAMIC_DEPTH_BOUNDS;
165 dest_mask |= RADV_DYNAMIC_STENCIL_COMPARE_MASK;
173 dest_mask |= RADV_DYNAMIC_STENCIL_WRITE_MASK;
181 dest_mask |
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/midgard/
H A Dmidgard_compile.c2504 int dest_mask = second->type == TAG_ALU_4 ? squeeze_writemask(second->alu.mask) : 0xF; local in function:can_run_concurrent_ssa
2506 if (dest_mask & source_mask)

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