| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i915_xvmc.c | 108 sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1; 315 pixel_shader_constants->dw1.reg_mask = REG_CR0; 404 buffer_info->dest_y.dw1.aux_id = 0; 405 buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK; 406 buffer_info->dest_y.dw1.fence_regs = 0; /* disabled *//* FIXME: tiled y for performance */ 407 buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */ 408 buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR; 409 buffer_info->dest_y.dw1.pitch = (pI915XvMC->yStride >> 2); /* in DWords */ 421 buffer_info->dest_u.dw1.aux_id = 0; 422 buffer_info->dest_u.dw1 [all...] |
| H A D | i915_structs.h | 51 } dw1; member in struct:i915_color_blt 123 } dw1; member in struct:i915_3dmpeg_macroblock_header 174 } dw1; member in struct:i915_3dmpeg_set_origin 193 } dw1; member in struct:i915_3dmpeg_slice 242 } dw1; member in struct:i915_3dstate_buffer_info 287 } dw1; member in struct:i915_3dstate_dest_buffer_variables 325 } dw1; member in struct:i915_3dstate_dest_buffer_variables_mpeg 412 } dw1; member in struct:i915_3dstate_map_state 521 } dw1; member in struct:i915_3dstate_sampler_state 557 } dw1; member in struct:arithmetic_inst 595 } dw1; member in struct:texture_inst 617 } dw1; member in struct:declaration_inst 723 } dw1; member in struct:i915_3dstate_pixel_shader_constants 746 } dw1; member in struct:_state_ddword 869 } dw1; member in struct:i915_3dstate_scissor_rectangle [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i915_xvmc.c | 108 sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1; 315 pixel_shader_constants->dw1.reg_mask = REG_CR0; 404 buffer_info->dest_y.dw1.aux_id = 0; 405 buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK; 406 buffer_info->dest_y.dw1.fence_regs = 0; /* disabled *//* FIXME: tiled y for performance */ 407 buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */ 408 buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR; 409 buffer_info->dest_y.dw1.pitch = (pI915XvMC->yStride >> 2); /* in DWords */ 421 buffer_info->dest_u.dw1.aux_id = 0; 422 buffer_info->dest_u.dw1 [all...] |
| H A D | i915_structs.h | 51 } dw1; member in struct:i915_color_blt 123 } dw1; member in struct:i915_3dmpeg_macroblock_header 174 } dw1; member in struct:i915_3dmpeg_set_origin 193 } dw1; member in struct:i915_3dmpeg_slice 242 } dw1; member in struct:i915_3dstate_buffer_info 287 } dw1; member in struct:i915_3dstate_dest_buffer_variables 325 } dw1; member in struct:i915_3dstate_dest_buffer_variables_mpeg 412 } dw1; member in struct:i915_3dstate_map_state 521 } dw1; member in struct:i915_3dstate_sampler_state 557 } dw1; member in struct:arithmetic_inst 595 } dw1; member in struct:texture_inst 617 } dw1; member in struct:declaration_inst 723 } dw1; member in struct:i915_3dstate_pixel_shader_constants 746 } dw1; member in struct:_state_ddword 869 } dw1; member in struct:i915_3dstate_scissor_rectangle [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/ |
| H A D | sb_bc_decoder.cpp | 34 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_cf 37 if ((dw1 >> 29) & 1) { // CF_ALU 42 CF_WORD1_EG(dw1).get_CF_INST() : 43 CF_WORD1_R6R7(dw1).get_CF_INST(); 59 CF_WORD1_EG w1(dw1); 71 CF_WORD1_CM w1(dw1); 86 CF_WORD1_R6R7 w1(dw1); 112 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_alu 125 CF_ALU_WORD1_R6 w1(dw1); 139 CF_ALU_WORD1_R7EGCM w1(dw1); 178 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_exp 232 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_mem 293 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_alu 407 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch 503 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_gds 539 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_mem 581 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_vtx [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sb/ |
| H A D | sb_bc_decoder.cpp | 34 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_cf 37 if ((dw1 >> 29) & 1) { // CF_ALU 42 CF_WORD1_EG(dw1).get_CF_INST() : 43 CF_WORD1_R6R7(dw1).get_CF_INST(); 59 CF_WORD1_EG w1(dw1); 71 CF_WORD1_CM w1(dw1); 86 CF_WORD1_R6R7 w1(dw1); 112 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_alu 125 CF_ALU_WORD1_R6 w1(dw1); 139 CF_ALU_WORD1_R7EGCM w1(dw1); 178 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_exp 232 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_cf_mem 293 uint32_t dw1 = dw[i++]; local in function:r600_sb::bc_decoder::decode_alu 407 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch 503 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_gds 539 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_mem 582 uint32_t dw1 = dw[i+1]; local in function:r600_sb::bc_decoder::decode_fetch_vtx [all...] |
| /xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/ |
| H A D | i915_xvmc.c | 161 sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1; 336 pixel_shader_constants->dw1.reg_mask = REG_CR0; 419 ssb->dw1.length = 7; /* 8 - 1 */ 430 psp->dw1.length = 66; /* 4 + 16 + 16 + 31 - 1 */ 441 psc->dw1.length = 5; /* 6 - 1 */ 466 buffer_info->dest_y.dw1.aux_id = 0; 467 buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK; 468 buffer_info->dest_y.dw1.fence_regs = 0; /* disabled */ /* FIXME: tiled y for performance */ 469 buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */ 470 buffer_info->dest_y.dw1 [all...] |
| H A D | i915_structs.h | 71 } dw1; member in struct:i915_color_blt 141 } dw1; member in struct:i915_3dmpeg_macroblock_header 198 } dw1; member in struct:i915_3dmpeg_set_origin 218 } dw1; member in struct:i915_3dmpeg_slice 270 } dw1; member in struct:i915_3dstate_buffer_info 317 } dw1; member in struct:i915_3dstate_dest_buffer_variables 356 } dw1; member in struct:i915_3dstate_dest_buffer_variables_mpeg 445 } dw1; member in struct:i915_3dstate_map_state 556 } dw1; member in struct:i915_3dstate_sampler_state 593 } dw1; member in struct:arithmetic_inst 632 } dw1; member in struct:texture_inst 655 } dw1; member in struct:declaration_inst 765 } dw1; member in struct:i915_3dstate_pixel_shader_constants 788 } dw1; member in struct:_state_ddword 970 } dw1; member in struct:i915_3dstate_scissor_rectangle [all...] |
| H A D | I810XvMC.c | 1133 uint dw1 = drps_table[~ps & 0x1]; local in function:renderIntrainField 1137 *dy++ = (1<<30) | (3<<28) | (0xf<<24) | dw1; 1151 *du++ = (2<<30) | (1<<28) | (1<<23) | dw1; 1162 *dv++ = (3<<30) | (1<<28) | (1<<22) | dw1; 1195 uint dw1; local in function:renderFieldinField 1211 dw1 = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | 1223 dw1 = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | 1232 dw1 = type_table[mb->macroblock_type & 0xf] | 1246 *dy++ = (1<<30) | (3<<28) | dw1; 1263 *du++ = (2<<30) | (1<<28) | dw1; 1304 uint dw1[2]; local in function:render16x8inField 1490 uint dw1; local in function:renderDualPrimeinField 1576 uint dw1[2]; local in function:renderFieldinFrame 1711 uint dw1[2]; local in function:renderFieldinFrameDCT0 1890 uint dw1; local in function:renderFrameinFrame 1984 uint dw1 = type_table[mb->macroblock_type & 0xf] | local in function:renderFrameinFrameDCT1 2101 uint dw1[2]; local in function:renderDualPrimeinFrame 2236 uint dw1[2]; local in function:renderDualPrimeinFrameDCT0 [all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/xvmc/ |
| H A D | I810XvMC.c | 1133 uint dw1 = drps_table[~ps & 0x1]; local in function:renderIntrainField 1137 *dy++ = (1<<30) | (3<<28) | (0xf<<24) | dw1; 1151 *du++ = (2<<30) | (1<<28) | (1<<23) | dw1; 1162 *dv++ = (3<<30) | (1<<28) | (1<<22) | dw1; 1195 uint dw1; local in function:renderFieldinField 1211 dw1 = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | 1223 dw1 = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | 1232 dw1 = type_table[mb->macroblock_type & 0xf] | 1246 *dy++ = (1<<30) | (3<<28) | dw1; 1263 *du++ = (2<<30) | (1<<28) | dw1; 1304 uint dw1[2]; local in function:render16x8inField 1490 uint dw1; local in function:renderDualPrimeinField 1576 uint dw1[2]; local in function:renderFieldinFrame 1711 uint dw1[2]; local in function:renderFieldinFrameDCT0 1890 uint dw1; local in function:renderFrameinFrame 1984 uint dw1 = type_table[mb->macroblock_type & 0xf] | local in function:renderFrameinFrameDCT1 2101 uint dw1[2]; local in function:renderDualPrimeinFrame 2236 uint dw1[2]; local in function:renderDualPrimeinFrameDCT0 [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/xvmc/ |
| H A D | I810XvMC.c | 1133 uint dw1 = drps_table[~ps & 0x1]; local in function:renderIntrainField 1137 *dy++ = (1<<30) | (3<<28) | (0xf<<24) | dw1; 1151 *du++ = (2<<30) | (1<<28) | (1<<23) | dw1; 1162 *dv++ = (3<<30) | (1<<28) | (1<<22) | dw1; 1195 uint dw1; local in function:renderFieldinField 1211 dw1 = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | 1223 dw1 = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | 1232 dw1 = type_table[mb->macroblock_type & 0xf] | 1246 *dy++ = (1<<30) | (3<<28) | dw1; 1263 *du++ = (2<<30) | (1<<28) | dw1; 1304 uint dw1[2]; local in function:render16x8inField 1490 uint dw1; local in function:renderDualPrimeinField 1576 uint dw1[2]; local in function:renderFieldinFrame 1711 uint dw1[2]; local in function:renderFieldinFrameDCT0 1890 uint dw1; local in function:renderFrameinFrame 1984 uint dw1 = type_table[mb->macroblock_type & 0xf] | local in function:renderFrameinFrameDCT1 2101 uint dw1[2]; local in function:renderDualPrimeinFrame 2236 uint dw1[2]; local in function:renderDualPrimeinFrameDCT0 [all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/ |
| H A D | brw_eu.h | 1152 } dw1; member in struct:brw_reg 1256 reg.dw1.bits.swizzle = swizzle; 1257 reg.dw1.bits.writemask = writemask; 1258 reg.dw1.bits.indirect_offset = 0; 1259 reg.dw1.bits.pad1 = 0; 1438 imm.dw1.f = f; 1446 imm.dw1.d = d; 1454 imm.dw1.ud = ud; 1462 imm.dw1.ud = uw | (uw << 16); 1470 imm.dw1 [all...] |
| H A D | brw_eu_emit.c | 123 insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; 133 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset; 139 insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; 252 insn->bits3.ud = reg.dw1.ud; 271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset; 273 insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset; 289 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); 290 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); 291 insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); 292 insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1 [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/ |
| H A D | brw_eu.h | 1152 } dw1; member in struct:brw_reg 1256 reg.dw1.bits.swizzle = swizzle; 1257 reg.dw1.bits.writemask = writemask; 1258 reg.dw1.bits.indirect_offset = 0; 1259 reg.dw1.bits.pad1 = 0; 1438 imm.dw1.f = f; 1446 imm.dw1.d = d; 1454 imm.dw1.ud = ud; 1462 imm.dw1.ud = uw | (uw << 16); 1470 imm.dw1 [all...] |
| H A D | brw_eu_emit.c | 123 insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; 133 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset; 139 insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; 252 insn->bits3.ud = reg.dw1.ud; 271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset; 273 insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset; 289 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); 290 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); 291 insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); 292 insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1 [all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen8_eu.c | 356 __gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); 459 inst->data[3] = reg.dw1.ud; 486 BRW_GET_SWZ(reg.dw1.bits.swizzle, 489 BRW_GET_SWZ(reg.dw1.bits.swizzle, 492 BRW_GET_SWZ(reg.dw1.bits.swizzle, 495 BRW_GET_SWZ(reg.dw1.bits.swizzle, 534 inst->data[3] = reg.dw1.ud; 557 BRW_GET_SWZ(reg.dw1.bits.swizzle, 560 BRW_GET_SWZ(reg.dw1.bits.swizzle, 563 BRW_GET_SWZ(reg.dw1 [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen8_eu.c | 356 __gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); 459 inst->data[3] = reg.dw1.ud; 486 BRW_GET_SWZ(reg.dw1.bits.swizzle, 489 BRW_GET_SWZ(reg.dw1.bits.swizzle, 492 BRW_GET_SWZ(reg.dw1.bits.swizzle, 495 BRW_GET_SWZ(reg.dw1.bits.swizzle, 534 inst->data[3] = reg.dw1.ud; 557 BRW_GET_SWZ(reg.dw1.bits.swizzle, 560 BRW_GET_SWZ(reg.dw1.bits.swizzle, 563 BRW_GET_SWZ(reg.dw1 [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_state.c | 209 GLuint dw0, dw1; local in function:i915EvalLogicOpBlendState 212 dw1 = i915->state.Ctx[I915_CTXREG_LIS6]; 216 dw1 &= ~S6_CBUF_BLEND_ENABLE; 222 dw1 |= S6_CBUF_BLEND_ENABLE; 225 dw1 &= ~S6_CBUF_BLEND_ENABLE; 229 dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) { 231 i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_state.c | 209 GLuint dw0, dw1; local in function:i915EvalLogicOpBlendState 212 dw1 = i915->state.Ctx[I915_CTXREG_LIS6]; 216 dw1 &= ~S6_CBUF_BLEND_ENABLE; 222 dw1 |= S6_CBUF_BLEND_ENABLE; 225 dw1 &= ~S6_CBUF_BLEND_ENABLE; 229 dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) { 231 i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_disasm.c | 1566 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) 1569 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); 1565 brw_disassemble_imm(const struct gen_device_info * devinfo,uint32_t dw3,uint32_t dw2,uint32_t dw1,uint32_t dw0) argument
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_disasm.c | 1807 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) 1810 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); 1806 brw_disassemble_imm(const struct intel_device_info * devinfo,uint32_t dw3,uint32_t dw2,uint32_t dw1,uint32_t dw0) argument
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| /xsrc/external/mit/xf86-video-glint/dist/src/ |
| H A D | pm2_video.c | 1052 int dw1 = pPPriv->dw - 1; local in function:RemakeGetCookies 1077 n1 = ((pBox->x1 - pPPriv->dx) * pPPriv->vw + dw1) / pPPriv->dw;
|