Searched refs:element_dw_size (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_debug.c638 unsigned element_dw_size; member in struct:si_log_chunk_desc_list
658 unsigned cpu_dw_offset = i * chunk->element_dw_size;
659 unsigned gpu_dw_offset = chunk->slot_remap(i) * chunk->element_dw_size;
667 switch (chunk->element_dw_size) {
712 if (memcmp(gpu_list, cpu_list, chunk->element_dw_size * 4) != 0) {
731 unsigned element_dw_size,
742 desc->first_active_slot * desc->element_dw_size;
744 active_range_dw_begin + desc->num_active_slots * desc->element_dw_size;
748 unsigned dw_begin = i * element_dw_size;
749 unsigned dw_end = dw_begin + element_dw_size;
727 si_dump_descriptor_list(struct si_screen * screen,struct si_descriptors * desc,const char * shader_name,const char * elem_name,unsigned element_dw_size,unsigned num_elements,slot_remap_func slot_remap,struct u_log_context * log) argument
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H A Dsi_descriptors.c109 unsigned element_dw_size,
117 assert(element_dw_size % 8 == 0);
118 for (i = 0; i < num_elements * element_dw_size / 8; i++)
125 unsigned element_dw_size,
128 desc->list = CALLOC(num_elements, element_dw_size * 4);
129 desc->element_dw_size = element_dw_size;
144 unsigned slot_size = desc->element_dw_size * 4;
159 desc->element_dw_size];
2277 unsigned slot_size = desc->element_dw_size *
108 si_init_descriptor_list(uint32_t * desc_list,unsigned element_dw_size,unsigned num_elements,const uint32_t * null_descriptor) argument
123 si_init_descriptors(struct si_descriptors * desc,short shader_userdata_rel_index,unsigned element_dw_size,unsigned num_elements) argument
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H A Dsi_state.h404 ubyte element_dw_size; member in struct:si_descriptors
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_debug.c631 unsigned element_dw_size; member in struct:si_log_chunk_desc_list
651 unsigned cpu_dw_offset = i * chunk->element_dw_size;
652 unsigned gpu_dw_offset = chunk->slot_remap(i) * chunk->element_dw_size;
660 switch (chunk->element_dw_size) {
696 if (memcmp(gpu_list, cpu_list, chunk->element_dw_size * 4) != 0) {
711 unsigned element_dw_size, unsigned num_elements,
719 unsigned active_range_dw_begin = desc->first_active_slot * desc->element_dw_size;
721 active_range_dw_begin + desc->num_active_slots * desc->element_dw_size;
725 unsigned dw_begin = i * element_dw_size;
726 unsigned dw_end = dw_begin + element_dw_size;
709 si_dump_descriptor_list(struct si_screen * screen,struct si_descriptors * desc,const char * shader_name,const char * elem_name,unsigned element_dw_size,unsigned num_elements,slot_remap_func slot_remap,struct u_log_context * log) argument
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H A Dsi_descriptors.c99 static void si_init_descriptor_list(uint32_t *desc_list, unsigned element_dw_size, argument
106 assert(element_dw_size % 8 == 0);
107 for (i = 0; i < num_elements * element_dw_size / 8; i++)
113 unsigned element_dw_size, unsigned num_elements)
115 desc->list = CALLOC(num_elements, element_dw_size * 4);
116 desc->element_dw_size = element_dw_size;
130 unsigned slot_size = desc->element_dw_size * 4;
144 uint32_t *descriptor = &desc->list[desc->slot_index_to_bind_directly * desc->element_dw_size];
2235 unsigned slot_size = desc->element_dw_size *
112 si_init_descriptors(struct si_descriptors * desc,short shader_userdata_rel_index,unsigned element_dw_size,unsigned num_elements) argument
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H A Dsi_state.h447 ubyte element_dw_size; member in struct:si_descriptors

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