Searched refs:fb_div (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_crtc.c328 int *fb_div,
338 *fb_div = floor(feedback_divider);
342 *fb_div = floor(feedback_divider + 0.5);
345 if ((*fb_div < pll->min_feedback_div) || (*fb_div > pll->max_feedback_div))
356 int *fb_div,
365 if (calc_fb_div(pll, freq, flags, post_div, (*ref_div), fb_div, fb_div_frac)) {
366 vco = pll->reference_freq * ((*fb_div) + ((*fb_div_frac) * 0.1)) / (*ref_div);
393 int fb_div = 0, fb_div_frac = 0, post_div = 0, ref_div = 0; local in function:RADEONComputePLL_new
408 if (!calc_fb_div(pll, freq, flags, post_div, ref_div, &fb_div,
323 calc_fb_div(RADEONPLLPtr pll,unsigned long freq,int flags,int post_div,int ref_div,int * fb_div,int * fb_div_frac) argument
352 calc_fb_ref_div(RADEONPLLPtr pll,unsigned long freq,int flags,int post_div,int * fb_div,int * fb_div_frac,int * ref_div) argument
[all...]
H A Datombios_crtc.c588 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; local in function:atombios_crtc_set_pll
646 &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags);
654 radeon_crtc->crtc_id, (unsigned int)ref_div, (unsigned int)fb_div,
655 (unsigned int)fb_div, (unsigned int)frac_fb_div, (unsigned int)post_div);
668 args.v2.usFbDiv = cpu_to_le16(fb_div);
678 args.v3.usFbDiv = cpu_to_le16(fb_div);
690 args.v5.usFbDiv = cpu_to_le16(fb_div);
H A Dradeon_pm.c47 int *fb_div,
69 *fb_div = req_clock & 0xff;
84 int ref_div, fb_div, post_div; local in function:RADEONSetEngineClock
91 eng_clock = calc_eng_mem_clock(pScrn, eng_clock, ref_div, &fb_div, &post_div);
117 tmp |= (fb_div & RADEON_SPLL_FB_DIV_MASK) << RADEON_SPLL_FB_DIV_SHIFT;
44 calc_eng_mem_clock(ScrnInfoPtr pScrn,uint32_t req_clock,int ref_div,int * fb_div,int * post_div) argument
H A Dradeon_probe.h383 uint32_t fb_div; member in struct:avivo_pll_state
H A Dradeon_driver.c4929 state->pll[0].fb_div = INREG(AVIVO_EXT1_PPLL_FB_DIV);
4938 state->pll[1].fb_div = INREG(AVIVO_EXT2_PPLL_FB_DIV);
4947 state->vga25_ppll.fb_div = INREG(AVIVO_VGA25_PPLL_FB_DIV);
4954 state->vga28_ppll.fb_div = INREG(AVIVO_VGA28_PPLL_FB_DIV);
4961 state->vga41_ppll.fb_div = INREG(AVIVO_VGA41_PPLL_FB_DIV);
5342 OUTREG(AVIVO_EXT1_PPLL_FB_DIV, state->pll[0].fb_div);
5351 OUTREG(AVIVO_EXT2_PPLL_FB_DIV, state->pll[1].fb_div);
5364 OUTREG(AVIVO_VGA25_PPLL_FB_DIV, state->vga25_ppll.fb_div);
5371 OUTREG(AVIVO_VGA28_PPLL_FB_DIV, state->vga28_ppll.fb_div);
5378 OUTREG(AVIVO_VGA41_PPLL_FB_DIV, state->vga41_ppll.fb_div);
[all...]
H A Dlegacy_crtc.c267 uint16_t fb_div)
274 vcoFreq = ((unsigned)reference_freq * fb_div) / ref_div;
266 RADEONComputePLLGain(uint16_t reference_freq,uint16_t ref_div,uint16_t fb_div) argument

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