Searched refs:fmask_state (Results 1 - 9 of 9) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_image.c914 uint32_t *fmask_state)
973 if (fmask_state) {
997 fmask_state[0] = (va >> 8) | image->planes[0].surface.fmask_tile_swizzle;
998 fmask_state[1] = S_00A004_BASE_ADDRESS_HI(va >> 40) | S_00A004_FORMAT(format) |
1000 fmask_state[2] = S_00A008_WIDTH_HI((width - 1) >> 2) | S_00A008_HEIGHT(height - 1) |
1002 fmask_state[3] =
1008 fmask_state[4] = S_00A010_DEPTH(last_layer) | S_00A010_BASE_ARRAY(first_layer);
1009 fmask_state[5] = 0;
1010 fmask_state[6] = S_00A018_META_PIPE_ALIGNED(1);
1011 fmask_state[
909 gfx10_make_texture_descriptor(struct radv_device * device,struct radv_image * image,bool is_storage_image,VkImageViewType view_type,VkFormat vk_format,const VkComponentMapping * mapping,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
1029 si_make_texture_descriptor(struct radv_device * device,struct radv_image * image,bool is_storage_image,VkImageViewType view_type,VkFormat vk_format,const VkComponentMapping * mapping,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
1219 radv_make_texture_descriptor(struct radv_device * device,struct radv_image * image,bool is_storage_image,VkImageViewType view_type,VkFormat vk_format,const VkComponentMapping * mapping,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
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/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_image.c501 uint32_t *fmask_state)
650 fmask_state[0] = va >> 8;
651 fmask_state[0] |= image->fmask.tile_swizzle;
652 fmask_state[1] = S_008F14_BASE_ADDRESS_HI(va >> 40) |
655 fmask_state[2] = S_008F18_WIDTH(width - 1) |
657 fmask_state[3] = S_008F1C_DST_SEL_X(V_008F1C_SQ_SEL_X) |
662 fmask_state[4] = 0;
663 fmask_state[5] = S_008F24_BASE_ARRAY(first_layer);
664 fmask_state[6] = 0;
665 fmask_state[
491 si_make_texture_descriptor(struct radv_device * device,struct radv_image * image,bool is_storage_image,VkImageViewType view_type,VkFormat vk_format,const VkComponentMapping * mapping,unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_state.c3804 unsigned depth, uint32_t *state, uint32_t *fmask_state)
3951 fmask_state[0] = (va >> 8) | tex->surface.fmask_tile_swizzle;
3952 fmask_state[1] = S_00A004_BASE_ADDRESS_HI(va >> 40) | S_00A004_FORMAT(format) |
3954 fmask_state[2] = S_00A008_WIDTH_HI((width - 1) >> 2) | S_00A008_HEIGHT(height - 1) |
3956 fmask_state[3] =
3961 fmask_state[4] = S_00A010_DEPTH(last_layer) | S_00A010_BASE_ARRAY(first_layer);
3962 fmask_state[5] = 0;
3963 fmask_state[6] = S_00A018_META_PIPE_ALIGNED(1);
3964 fmask_state[7] = 0;
3977 unsigned depth, uint32_t *state, uint32_t *fmask_state)
3800 gfx10_make_texture_descriptor(struct si_screen * screen,struct si_texture * tex,bool sampler,enum pipe_texture_target target,enum pipe_format pipe_format,const unsigned char state_swizzle[4],unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
3971 si_make_texture_descriptor(struct si_screen * screen,struct si_texture * tex,bool sampler,enum pipe_texture_target target,enum pipe_format pipe_format,const unsigned char state_swizzle[4],unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
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H A Dsi_pipe.h522 uint32_t *fmask_state);
677 uint32_t fmask_state[8]; member in struct:si_sampler_view
H A Dsi_descriptors.c474 memcpy(desc + 8, sview->fmask_state, 8 * 4);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_state.c3693 uint32_t *fmask_state)
3998 fmask_state[0] = (va >> 8) | tex->surface.fmask_tile_swizzle;
3999 fmask_state[1] = S_008F14_BASE_ADDRESS_HI(va >> 40) |
4002 fmask_state[2] = S_008F18_WIDTH(width - 1) |
4004 fmask_state[3] = S_008F1C_DST_SEL_X(V_008F1C_SQ_SEL_X) |
4009 fmask_state[4] = 0;
4010 fmask_state[5] = S_008F24_BASE_ARRAY(first_layer);
4011 fmask_state[6] = 0;
4012 fmask_state[7] = 0;
4015 fmask_state[
3683 si_make_texture_descriptor(struct si_screen * screen,struct si_texture * tex,bool sampler,enum pipe_texture_target target,enum pipe_format pipe_format,const unsigned char state_swizzle[4],unsigned first_level,unsigned last_level,unsigned first_layer,unsigned last_layer,unsigned width,unsigned height,unsigned depth,uint32_t * state,uint32_t * fmask_state) argument
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H A Dsi_state.h512 uint32_t *fmask_state);
H A Dsi_pipe.h594 uint32_t fmask_state[8]; member in struct:si_sampler_view
H A Dsi_descriptors.c465 memcpy(desc + 8, sview->fmask_state, 8*4);

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