Searched refs:getDef (Results 1 - 25 of 34) sorted by relevance

12

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_lowering_gv100.cpp39 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred);
65 bld.mkOp2(OP_MERGE, i->dType, i->getDef(0), def[0], def[1]);
80 src2 = bld.mkOp2(OP_MERGE, TYPE_U64, bld.getSSA(8), src2s[0], src2s[1])->getDef(0);
103 bld.mkOp3(OP_SELP, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1), pred);
113 bld.mkOp3(OP_MAD, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1),
138 bld.mkOp3(OP_LOP3_LUT, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1),
146 bld.mkOp3(OP_LOP3_LUT, TYPE_U32, i->getDef(0), bld.mkImm(0), i->getSrc(0),
161 bld.mkBMov(i->getDef(0), bld.mkTSVal(TS_MACTIVE));
162 Instruction *b = bld.mkBMov(bld.mkTSVal(TS_PQUAD_MACTIVE), i->getDef(0));
197 i = bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(
[all...]
H A Dnv50_ir_lowering_gm107.cpp200 bld.mkOp3(OP_SHFL, TYPE_F32, tex->getDef(c), tex->getDef(c), bld.mkImm(0), quad);
207 mov = bld.mkMov(def[c][l], tex->getDef(c));
214 Instruction *u = bld.mkOp(OP_UNION, TYPE_U32, i->getDef(c));
250 insn->setSrc(0, shfl->getDef(0));
311 bld.mkOp2(OP_DIV, TYPE_U32, suq->getDef(d), suq->getDef(d),
319 Value *dst = suq->getDef(d);
340 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(0), suq->getDef(
[all...]
H A Dnv50_ir_lowering_nvc0.cpp76 bld.mkMovFromReg(i->getDef(0), i->op == OP_DIV ? 0 : 1);
93 def[0] = bld.mkMovToReg(0, src[0])->getDef(0);
94 def[1] = bld.mkMovToReg(1, src[1])->getDef(0);
108 bld.mkOp2(OP_MERGE, TYPE_U64, i->getDef(0), def[0], def[1]);
128 Value *src[2], *dst[2], *def = i->getDef(0);
208 Value *dst64 = lo->getDef(0);
587 prev->setSrc(prev->srcCount(), useVec[i].tex->getDef(0));
593 bar->setSrc(bar->srcCount(), useVec[i].tex->getDef(0));
840 if (!i->getDef(0)->refCount())
1277 bld.mkQuadop(0x00, tex->getDef(
[all...]
H A Dnv50_ir_lowering_nv50.cpp198 bld->mkOp2(OP_UNION, mul->sType, mul->getDef(0), rr[5], rr[6]);
200 bld->mkMov(mul->getDef(0), r[4]);
203 bld->mkMov(mul->getDef(0), t[3]);
438 i->getDef(0)->reg.size = 2; // $aX are only 16 bit
471 arl = bld.mkOp2(OP_SHL, TYPE_U32, i->getDef(0), bld.getSSA(), bld.mkImm(0));
480 Value *def = mul->getDef(0);
489 Value *res = cloneShallow(func, mul->getDef(0));
492 add->setSrc(0, mul->getDef(0));
609 if (insn->defExists(0) && insn->getDef(0)->reg.file == FILE_ADDRESS)
710 tid = bld.mkMov(bld.getScratch(), arg, TYPE_U32)->getDef(
[all...]
H A Dnv50_ir_peephole.cpp53 if (!getDef(0)->equals(getSrc(0)))
74 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
110 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
289 if (ld->getDef(0)->refCount() == 0)
764 i->setSrc(1, bld.mkMov(bld.getSSA(type), i->getSrc(0), type)->getDef(0));
932 mul2->def(0).replace(mul1->getDef(0), false);
939 mul2->def(0).replace(mul1->getDef(0), false);
947 if (mul2->getDef(0)->refCount() == 1 && !mul2->saturate) {
951 insn = (*mul2->getDef(
[all...]
H A Dnv50_ir_ra.cpp517 LValue *tmp = new_LValue(func, phi->getDef(0)->asLValue());
563 LValue *tmp = new_LValue(func, cal->getDef(d)->asLValue());
569 mov->setDef(0, cal->getDef(d));
647 bb->liveSet.clr(i->getDef(d)->id);
653 bb->liveSet.clr(i->getDef(0)->id);
700 bb->liveSet.clr(i->getDef(0)->id);
721 bb->liveSet.clr(i->getDef(d)->id);
722 if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs
723 i->getDef(d)->livei.extend(i->serial, i->serial);
1090 LValue *rep = (split ? insn->getSrc(0) : insn->getDef(
[all...]
H A Dnv50_ir.cpp777 i->setDef(d, pol.get(getDef(d)));
802 if (getDef(i)->reg.file != getDef(d)->reg.file)
876 if (getDef(d)->inFile(FILE_PREDICATE) || getDef(d)->inFile(FILE_FLAGS))
886 if (getDef(d)->interfers(i->getSrc(s)))
896 if (getDef(d)->interfers(i->getDef(c)))
H A Dnv50_ir_build_util.cpp190 insn->getDef(0)->reg.data.id = id;
294 val = mkMov(getSSA(halfSize * 2), val, fTy)->getDef(0);
625 i->setDef(0, cloneShallow(fn, i->getDef(0)));
626 i->getDef(0)->reg.size = 4;
631 hi->getDef(0)->reg.data.id++;
H A Dnv50_ir_ssa.cpp250 assigned.set(i->getDef(d)->id);
282 bb->defSet.set(i->getDef(d)->id);
H A Dnv50_ir_emit_nvc0.cpp1315 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1317 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1597 rDef = i->getDef(0);
1599 pDef = i->getDef(0);
1603 rDef = i->getDef(1);
1605 pDef = i->getDef(1);
1662 code[0] |= ((i->getDef(0)->reg.size / 4) - 1) << 5;
2295 code[1] |= i->getDef(0)->reg.data.id << 23;
2299 code[1] |= i->getDef(1)->reg.data.id << 23;
3365 recordWr(insn->getDef(
[all...]
H A Dnv50_ir_emit_gv100.cpp361 emitField(84, 1, insn->getDef(0)->reg.data.ts == TS_PQUAD_MACTIVE ? 1 : 0);
709 emitPRED (81, insn->flagsDef >= 0 ? insn->getDef(insn->flagsDef) : NULL);
843 emitField(74, 2, (insn->getDef(0)->reg.size / 4) - 1);
1548 emitField(74, 2, (insn->getDef(0)->reg.size / 4) - 1);
H A Dnv50_ir_emit_gk110.cpp497 assert(i->getDef(0)->reg.data.id == i->getSrc(2)->reg.data.id);
1269 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1271 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1886 code[1] |= i->getDef(1)->reg.data.id << pos;
1890 code[1] |= i->getDef(1)->reg.data.id << pos;
H A Dnv50_ir_emit_gm107.cpp1396 assert(insn->getDef(0)->reg.data.id == insn->getSrc(2)->reg.data.id);
2529 emitField(0x2f, 2, (insn->getDef(0)->reg.size / 4) - 1);
2560 emitField(0x2f, 2, (insn->getDef(0)->reg.size / 4) - 1);
3969 recordWr(insn->getDef(d), cycle, ready);
4120 const Value* def = insn->getDef(d);
4167 if (doesInsnWriteTo(bari, insn->getDef(d)))
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_lowering_gm107.cpp181 bld.mkOp3(OP_SHFL, TYPE_F32, tex->getDef(c), tex->getDef(c), bld.mkImm(0), quad);
188 mov = bld.mkMov(def[c][l], tex->getDef(c));
195 Instruction *u = bld.mkOp(OP_UNION, TYPE_U32, i->getDef(c));
231 insn->setSrc(0, shfl->getDef(0));
293 bld.mkOp2(OP_DIV, TYPE_U32, suq->getDef(d), suq->getDef(d),
301 Value *dst = suq->getDef(d);
322 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(0), suq->getDef(
[all...]
H A Dnv50_ir_lowering_nvc0.cpp76 bld.mkMovFromReg(i->getDef(0), i->op == OP_DIV ? 0 : 1);
93 def[0] = bld.mkMovToReg(0, src[0])->getDef(0);
94 def[1] = bld.mkMovToReg(1, src[1])->getDef(0);
108 bld.mkOp2(OP_MERGE, TYPE_U64, i->getDef(0), def[0], def[1]);
128 Value *src[2], *dst[2], *def = i->getDef(0);
208 Value *dst64 = lo->getDef(0);
576 prev->setSrc(prev->srcCount(), useVec[i].tex->getDef(0));
582 bar->setSrc(bar->srcCount(), useVec[i].tex->getDef(0));
829 if (!i->getDef(0)->refCount())
1263 bld.mkQuadop(0x00, tex->getDef(
[all...]
H A Dnv50_ir_lowering_nv50.cpp180 bld->mkOp2(OP_UNION, mul->sType, mul->getDef(0), rr[5], rr[6]);
182 bld->mkMov(mul->getDef(0), r[4]);
185 bld->mkMov(mul->getDef(0), t[3]);
415 i->getDef(0)->reg.size = 2; // $aX are only 16 bit
448 arl = bld.mkOp2(OP_SHL, TYPE_U32, i->getDef(0), bld.getSSA(), bld.mkImm(0));
457 Value *def = mul->getDef(0);
466 Value *res = cloneShallow(func, mul->getDef(0));
469 add->setSrc(0, mul->getDef(0));
586 if (insn->defExists(0) && insn->getDef(0)->reg.file == FILE_ADDRESS)
676 tid = bld.mkMov(bld.getScratch(), arg, TYPE_U32)->getDef(
[all...]
H A Dnv50_ir_peephole.cpp53 if (!getDef(0)->equals(getSrc(0)))
74 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
110 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
287 if (ld->getDef(0)->refCount() == 0)
748 i->setSrc(1, bld.mkMov(bld.getSSA(type), i->getSrc(0), type)->getDef(0));
899 mul2->def(0).replace(mul1->getDef(0), false);
906 mul2->def(0).replace(mul1->getDef(0), false);
914 if (mul2->getDef(0)->refCount() == 1 && !mul2->saturate) {
918 insn = (*mul2->getDef(
[all...]
H A Dnv50_ir_ra.cpp472 LValue *tmp = new_LValue(func, phi->getDef(0)->asLValue());
518 LValue *tmp = new_LValue(func, cal->getDef(d)->asLValue());
524 mov->setDef(0, cal->getDef(d));
602 bb->liveSet.clr(i->getDef(d)->id);
608 bb->liveSet.clr(i->getDef(0)->id);
657 bb->liveSet.clr(i->getDef(0)->id);
678 bb->liveSet.clr(i->getDef(d)->id);
679 if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs
680 i->getDef(d)->livei.extend(i->serial, i->serial);
1043 LValue *rep = (split ? insn->getSrc(0) : insn->getDef(
[all...]
H A Dnv50_ir.cpp773 i->setDef(d, pol.get(getDef(d)));
798 if (getDef(i)->reg.file != getDef(d)->reg.file)
872 if (getDef(d)->inFile(FILE_PREDICATE) || getDef(d)->inFile(FILE_FLAGS))
882 if (getDef(d)->interfers(i->getSrc(s)))
892 if (getDef(d)->interfers(i->getDef(c)))
H A Dnv50_ir_build_util.cpp188 insn->getDef(0)->reg.data.id = id;
292 val = mkMov(getSSA(halfSize * 2), val, fTy)->getDef(0);
595 i->setDef(0, cloneShallow(fn, i->getDef(0)));
596 i->getDef(0)->reg.size = 4;
601 hi->getDef(0)->reg.data.id++;
H A Dnv50_ir_ssa.cpp250 assigned.set(i->getDef(d)->id);
282 bb->defSet.set(i->getDef(d)->id);
H A Dnv50_ir_emit_nvc0.cpp1308 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1310 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1590 rDef = i->getDef(0);
1592 pDef = i->getDef(0);
1596 rDef = i->getDef(1);
1598 pDef = i->getDef(1);
1655 code[0] |= ((i->getDef(0)->reg.size / 4) - 1) << 5;
2288 code[1] |= i->getDef(0)->reg.data.id << 23;
2292 code[1] |= i->getDef(1)->reg.data.id << 23;
3357 recordWr(insn->getDef(
[all...]
H A Dnv50_ir_emit_gk110.cpp499 assert(i->getDef(0)->reg.data.id == i->getSrc(2)->reg.data.id);
1262 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1264 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1879 code[1] |= i->getDef(1)->reg.data.id << pos;
1883 code[1] |= i->getDef(1)->reg.data.id << pos;
H A Dnv50_ir_print.cpp702 pos += getDef(d)->print(&buf[pos], size - pos);
H A Dnv50_ir_emit_gm107.cpp1358 assert(insn->getDef(0)->reg.data.id == insn->getSrc(2)->reg.data.id);
2464 emitField(0x2f, 2, (insn->getDef(0)->reg.size / 4) - 1);
2495 emitField(0x2f, 2, (insn->getDef(0)->reg.size / 4) - 1);
4046 recordWr(insn->getDef(d), cycle, ready);
4197 const Value* def = insn->getDef(d);
4244 if (doesInsnWriteTo(bari, insn->getDef(d)))

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