| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_gv100.cpp | 38 i->sType, bld.mkImm(0), i->getSrc(2))->ftz = i->ftz; 39 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred); 53 if (i->getSrc(s)->reg.size == 8) { 54 bld.mkSplit(src[s], 4, i->getSrc(s)); 56 src[s][0] = i->getSrc(s); 76 (!i->getSrc(2)->asImm() || i->getSrc(2)->asImm()->reg.data.u32)) { 79 bld.mkMov(src2s[1], i->getSrc(2)); 86 i->getSrc( [all...] |
| H A D | nv50_ir_lowering_helper.cpp | 70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0)); 72 bld.mkSplit(srcComp, 4, insn->getSrc(0)); 96 bld.mkSplit(src, 4, insn->getSrc(0)); 101 bld.mkOp2(OP_SHR, TYPE_S32, tmp, insn->getSrc(0), bld.loadImm(bld.getSSA(), 31)); 127 bld.mkSplit(src0, 4, insn->getSrc(0)); 128 bld.mkSplit(src1, 4, insn->getSrc(1)); 156 Storage ® = insn->getSrc(0)->reg; 185 insn->setSrc(1, insn->getSrc(0)); 200 Value *tmp = bld.mkOp2v(OP_MAX, dTy, bld.getSSA(8), insn->getSrc(0), bld.loadImm(bld.getSSA(8), 0.0)); 224 bld.mkSplit(src0, 4, insn->getSrc( [all...] |
| H A D | nv50_ir_peephole.cpp | 53 if (!getDef(0)->equals(getSrc(0))) 56 if (!def(0).rep()->equals(getSrc(1))) 103 if (mov->op != OP_MOV || mov->fixed || !mov->getSrc(0)->asLValue()) 109 si = mov->getSrc(0)->getInsn(); 112 mov->def(0).replace(mov->getSrc(0), false); 138 si = i->getSrc(0)->getInsn(); 139 if (si->op != OP_SPLIT || si != i->getSrc(1)->getInsn()) 141 i->def(0).replace(si->getSrc(0), false); 212 Instruction *i0 = insn->getSrc(0)->getInsn(); 213 Instruction *i1 = insn->getSrc( [all...] |
| H A D | nv50_ir_lowering_gm107.cpp | 58 bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); 60 bld.mkOp1(OP_MOV , TYPE_U32, src0, i->getSrc(0)); 146 bld.mkOp3(OP_SHFL, TYPE_F32, arr, i->getSrc(0), lane, quad); 148 bld.mkOp3(OP_SHFL, TYPE_F32, shadow, i->getSrc(array + dim + indirect), lane, quad); 153 bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad); 243 shfl = bld.mkOp3(OP_SHFL, TYPE_F32, bld.getScratch(), insn->getSrc(0), 249 insn->setSrc(1, insn->getSrc(0)); 263 if (i->getSrc(1)) 264 bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc( [all...] |
| H A D | nv50_ir_from_nir.cpp | 96 Value* getSrc(nir_alu_src *, uint8_t component = 0); 97 Value* getSrc(nir_register *, uint8_t); 98 Value* getSrc(nir_src *, uint8_t, bool indirect = false); 99 Value* getSrc(nir_ssa_def *, uint8_t); 777 Converter::getSrc(nir_alu_src *src, uint8_t component) function in class:__anonbe08c7a90110::Converter 783 return getSrc(&src->src, src->swizzle[component]); 787 Converter::getSrc(nir_register *reg, uint8_t idx) function in class:__anonbe08c7a90110::Converter 796 Converter::getSrc(nir_src *src, uint8_t idx, bool indirect) function in class:__anonbe08c7a90110::Converter 799 return getSrc(src->ssa, idx); 803 return getSrc(sr 813 Converter::getSrc(nir_ssa_def *src, uint8_t idx) function in class:__anonbe08c7a90110::Converter [all...] |
| H A D | nv50_ir_inlines.h | 246 return srcs[s].isIndirect(dim) ? getSrc(srcs[s].indirect[dim]) : NULL; 251 return (predSrc >= 0) ? getSrc(predSrc) : NULL; 276 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; 281 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; 331 pol.set(obj->getSrc(i), obj->getSrc(i));
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| H A D | nv50_ir_lowering_nv50.cpp | 98 bld->mkOp1(OP_ABS, mul->sType, s[0], mul->getSrc(0)); 99 bld->mkOp1(OP_ABS, mul->sType, s[1], mul->getSrc(1)); 102 s[0] = mul->getSrc(0); 103 s[1] = mul->getSrc(1); 171 bld->mkOp2(OP_XOR, fTy, NULL, mul->getSrc(0), mul->getSrc(1)) 260 (*it)->getSrc(1)->defs.front()->getInsn()->setDef(0, (*it)->getSrc(0)); 272 ImmediateValue *imm = i->getSrc(s)->asImm(); 387 if (st->src(0).isIndirect(0) || st->getSrc( [all...] |
| H A D | nv50_ir_lowering_nvc0.cpp | 53 Instruction *ld = i->getSrc(s)->getInsn(); 57 bld.mkMovToReg(s, i->getSrc(s)); 59 assert(ld->getSrc(0) != NULL); 60 bld.mkMovToReg(s, ld->getSrc(0)); 129 bld.mkSplit(src, 4, i->getSrc(0)); 207 Value *shift = lo->getSrc(1); 214 bld.mkSplit(src, 4, lo->getSrc(0)); 303 bld.mkSplit(src0, 4, cmp->getSrc(0)); 304 bld.mkSplit(src1, 4, cmp->getSrc(1)); 712 ImmediateValue *imm = i->getSrc( [all...] |
| H A D | nv50_ir_from_tgsi.cpp | 193 SrcRegister getSrc(unsigned int s) const function in class:tgsi::Instruction 1478 insn.getSrc(0).getFile() == TGSI_FILE_INPUT; 1578 info_out->io.edgeFlagIn = insn.getSrc(0).getIndex(0); 1593 insn.getSrc(0).getFile() != TGSI_FILE_MEMORY || 1594 memoryFiles[insn.getSrc(0).getIndex(0)].mem_type == 1619 scanInstructionSrc(insn, insn.getSrc(s), insn.srcMask(s)); 1633 switch (getSrc(s).getFile()) { 1636 r = getSrc(s).getIndex(0); 1640 r = getSrc(s).getIndex(0); 1860 Modifier m = tgsi.getSrc( [all...] |
| H A D | nv50_ir_ra.cpp | 457 phis.insert(std::make_pair(std::make_pair(phi, pb), phi->getSrc(j))); 520 mov->setSrc(0, phi->getSrc(j)); 549 LValue *tmp = new_LValue(func, cal->getSrc(s)->asLValue()); 555 mov->setSrc(0, cal->getSrc(s)); 649 if (i->getSrc(s)->asLValue()) 650 bb->liveSet.set(i->getSrc(s)->id); 704 if (i->getSrc(s)->getUniqueInsn()->bb == bb) // XXX: reachableBy ? 705 bb->liveSet.set(i->getSrc(s)->id); 707 bb->liveSet.clr(i->getSrc(s)->id); 727 if (!i->getSrc( [all...] |
| H A D | nv50_ir_ssa.cpp | 247 if (i->getSrc(s)->asLValue() && !assigned.test(i->getSrc(s)->id)) 248 usedBeforeAssigned.set(i->getSrc(s)->id); 480 lval = stmt->getSrc(s)->asLValue(); 487 lval = mkUndefined(stmt->getSrc(s)); 517 lval = getStackTop(phi->getSrc(p)); 519 lval = mkUndefined(phi->getSrc(p));
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| H A D | nv50_ir_build_util.cpp | 204 insn->getSrc(0)->reg.data.id = id; 634 if (lo->getSrc(s)->reg.size < 8) { 636 hi->setSrc(s, lo->getSrc(s)); 640 if (lo->getSrc(s)->refCount() > 1) 641 lo->setSrc(s, cloneShallow(fn, lo->getSrc(s))); 642 lo->getSrc(s)->reg.size /= 2; 643 hi->setSrc(s, cloneShallow(fn, lo->getSrc(s))); 647 hi->getSrc(s)->reg.data.u64 >>= 32; 653 hi->getSrc(s)->reg.data.offset += 4; 657 hi->getSrc( [all...] |
| H A D | nv50_ir_emit_gk110.cpp | 332 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; 333 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64; 358 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; 361 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType); 497 assert(i->getDef(0)->reg.data.id == i->getSrc(2)->reg.data.id); 1269 if (i->getDef(0)->interfers(i->next->getSrc(0))) 1271 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1)); 1466 ImmediateValue *imm = i->getSrc(0)->asImm(); 1476 ImmediateValue *imm = i->getSrc(0)->asImm(); 1599 imm = i->getSrc( [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_helper.cpp | 70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0)); 72 bld.mkSplit(srcComp, 4, insn->getSrc(0)); 96 bld.mkSplit(src, 4, insn->getSrc(0)); 101 bld.mkOp2(OP_SHR, TYPE_S32, tmp, insn->getSrc(0), bld.loadImm(bld.getSSA(), 31)); 127 bld.mkSplit(src0, 4, insn->getSrc(0)); 128 bld.mkSplit(src1, 4, insn->getSrc(1)); 156 Storage ® = insn->getSrc(0)->reg; 185 insn->setSrc(1, insn->getSrc(0)); 200 Value *tmp = bld.mkOp2v(OP_MAX, dTy, bld.getSSA(8), insn->getSrc(0), bld.loadImm(bld.getSSA(8), 0.0)); 224 bld.mkSplit(src0, 4, insn->getSrc( [all...] |
| H A D | nv50_ir_peephole.cpp | 53 if (!getDef(0)->equals(getSrc(0))) 56 if (!def(0).rep()->equals(getSrc(1))) 103 if (mov->op != OP_MOV || mov->fixed || !mov->getSrc(0)->asLValue()) 109 si = mov->getSrc(0)->getInsn(); 112 mov->def(0).replace(mov->getSrc(0), false); 138 si = i->getSrc(0)->getInsn(); 139 if (si->op != OP_SPLIT || si != i->getSrc(1)->getInsn()) 141 i->def(0).replace(si->getSrc(0), false); 212 Instruction *i0 = insn->getSrc(0)->getInsn(); 213 Instruction *i1 = insn->getSrc( [all...] |
| H A D | nv50_ir_lowering_nv50.cpp | 80 bld->mkOp1(OP_ABS, mul->sType, s[0], mul->getSrc(0)); 81 bld->mkOp1(OP_ABS, mul->sType, s[1], mul->getSrc(1)); 84 s[0] = mul->getSrc(0); 85 s[1] = mul->getSrc(1); 153 bld->mkOp2(OP_XOR, fTy, NULL, mul->getSrc(0), mul->getSrc(1)) 237 (*it)->getSrc(1)->defs.front()->getInsn()->setDef(0, (*it)->getSrc(0)); 249 ImmediateValue *imm = i->getSrc(s)->asImm(); 364 if (st->src(0).isIndirect(0) || st->getSrc( [all...] |
| H A D | nv50_ir_lowering_gm107.cpp | 58 bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); 60 bld.mkOp1(OP_MOV , TYPE_U32, src0, i->getSrc(0)); 127 bld.mkOp3(OP_SHFL, TYPE_F32, arr, i->getSrc(0), lane, quad); 129 bld.mkOp3(OP_SHFL, TYPE_F32, shadow, i->getSrc(array + dim + indirect), lane, quad); 134 bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad); 224 shfl = bld.mkOp3(OP_SHFL, TYPE_F32, bld.getScratch(), insn->getSrc(0), 230 insn->setSrc(1, insn->getSrc(0)); 245 if (i->getSrc(1)) 246 bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc( [all...] |
| H A D | nv50_ir_from_nir.cpp | 86 Value* getSrc(nir_alu_src *, uint8_t component = 0); 87 Value* getSrc(nir_register *, uint8_t); 88 Value* getSrc(nir_src *, uint8_t, bool indirect = false); 89 Value* getSrc(nir_ssa_def *, uint8_t); 726 Converter::getSrc(nir_alu_src *src, uint8_t component) function in class:__anon42ea91d60110::Converter 732 return getSrc(&src->src, src->swizzle[component]); 736 Converter::getSrc(nir_register *reg, uint8_t idx) function in class:__anon42ea91d60110::Converter 745 Converter::getSrc(nir_src *src, uint8_t idx, bool indirect) function in class:__anon42ea91d60110::Converter 748 return getSrc(src->ssa, idx); 752 return getSrc(sr 762 Converter::getSrc(nir_ssa_def *src, uint8_t idx) function in class:__anon42ea91d60110::Converter [all...] |
| H A D | nv50_ir_lowering_nvc0.cpp | 53 Instruction *ld = i->getSrc(s)->getInsn(); 57 bld.mkMovToReg(s, i->getSrc(s)); 59 assert(ld->getSrc(0) != NULL); 60 bld.mkMovToReg(s, ld->getSrc(0)); 129 bld.mkSplit(src, 4, i->getSrc(0)); 207 Value *shift = lo->getSrc(1); 214 bld.mkSplit(src, 4, lo->getSrc(0)); 303 bld.mkSplit(src0, 4, cmp->getSrc(0)); 304 bld.mkSplit(src1, 4, cmp->getSrc(1)); 701 ImmediateValue *imm = i->getSrc( [all...] |
| H A D | nv50_ir_inlines.h | 246 return srcs[s].isIndirect(dim) ? getSrc(srcs[s].indirect[dim]) : NULL; 251 return (predSrc >= 0) ? getSrc(predSrc) : NULL; 276 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; 281 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; 331 pol.set(obj->getSrc(i), obj->getSrc(i));
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| H A D | nv50_ir_from_tgsi.cpp | 194 SrcRegister getSrc(unsigned int s) const function in class:tgsi::Instruction 1510 insn.getSrc(0).getFile() == TGSI_FILE_INPUT; 1601 info->io.edgeFlagIn = insn.getSrc(0).getIndex(0); 1616 insn.getSrc(0).getFile() != TGSI_FILE_MEMORY || 1617 memoryFiles[insn.getSrc(0).getIndex(0)].mem_type == 1640 scanInstructionSrc(insn, insn.getSrc(s), insn.srcMask(s)); 1654 switch (getSrc(s).getFile()) { 1657 r = getSrc(s).getIndex(0); 1661 r = getSrc(s).getIndex(0); 1878 Modifier m = tgsi.getSrc( [all...] |
| H A D | nv50_ir_ra.cpp | 412 phis.insert(std::make_pair(std::make_pair(phi, pb), phi->getSrc(j))); 475 mov->setSrc(0, phi->getSrc(j)); 504 LValue *tmp = new_LValue(func, cal->getSrc(s)->asLValue()); 510 mov->setSrc(0, cal->getSrc(s)); 604 if (i->getSrc(s)->asLValue()) 605 bb->liveSet.set(i->getSrc(s)->id); 661 if (i->getSrc(s)->getUniqueInsn()->bb == bb) // XXX: reachableBy ? 662 bb->liveSet.set(i->getSrc(s)->id); 664 bb->liveSet.clr(i->getSrc(s)->id); 684 if (!i->getSrc( [all...] |
| H A D | nv50_ir_ssa.cpp | 247 if (i->getSrc(s)->asLValue() && !assigned.test(i->getSrc(s)->id)) 248 usedBeforeAssigned.set(i->getSrc(s)->id); 480 lval = stmt->getSrc(s)->asLValue(); 487 lval = mkUndefined(stmt->getSrc(s)); 517 lval = getStackTop(phi->getSrc(p)); 519 lval = mkUndefined(phi->getSrc(p));
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| H A D | nv50_ir_build_util.cpp | 202 insn->getSrc(0)->reg.data.id = id; 604 if (lo->getSrc(s)->reg.size < 8) { 606 hi->setSrc(s, lo->getSrc(s)); 610 if (lo->getSrc(s)->refCount() > 1) 611 lo->setSrc(s, cloneShallow(fn, lo->getSrc(s))); 612 lo->getSrc(s)->reg.size /= 2; 613 hi->setSrc(s, cloneShallow(fn, lo->getSrc(s))); 617 hi->getSrc(s)->reg.data.u64 >>= 32; 623 hi->getSrc(s)->reg.data.offset += 4; 627 hi->getSrc( [all...] |
| H A D | nv50_ir_emit_gk110.cpp | 334 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; 335 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64; 360 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; 363 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType); 499 assert(i->getDef(0)->reg.data.id == i->getSrc(2)->reg.data.id); 1262 if (i->getDef(0)->interfers(i->next->getSrc(0))) 1264 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1)); 1459 ImmediateValue *imm = i->getSrc(0)->asImm(); 1469 ImmediateValue *imm = i->getSrc(0)->asImm(); 1592 imm = i->getSrc( [all...] |