| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_clear.c | 847 uint64_t htile_offset = zstex->surface.meta_offset; local in function:si_fast_clear
857 htile_offset += zstex->surface.u.gfx9.meta_levels[level].offset;
877 si_init_buffer_clear(&info[num_clears++], &zstex->buffer.b.b, htile_offset,
891 si_init_buffer_clear(&info[num_clears++], &zstex->buffer.b.b, htile_offset,
916 si_init_buffer_clear_rmw(&info[num_clears++], &zstex->buffer.b.b, htile_offset,
929 si_init_buffer_clear_rmw(&info[num_clears++], &zstex->buffer.b.b, htile_offset,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| H A D | r600_texture.c | 427 rtex->htile_offset = new_tex->htile_offset;
434 assert(!rtex->htile_offset);
823 rtex->htile_offset = align(rtex->size, rtex->surface.htile_alignment);
824 rtex->size = rtex->htile_offset + rtex->surface.htile_size;
863 if (rtex->htile_offset)
866 rtex->htile_offset, rtex->surface.htile_size,
1001 if (rtex->htile_offset) {
1005 rtex->htile_offset,
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| H A D | r600_pipe_common.h | 231 uint64_t htile_offset; member in struct:r600_texture
915 return tex->htile_offset && level == 0;
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| H A D | r600_state.c | 1074 surf->db_htile_data_base = rtex->htile_offset >> 8;
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| H A D | evergreen_state.c | 1429 uint64_t va = rtex->resource.gpu_address + rtex->htile_offset;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| H A D | r600_texture.c | 426 rtex->htile_offset = new_tex->htile_offset;
433 assert(!rtex->htile_offset);
818 rtex->htile_offset = align(rtex->size, 1 << rtex->surface.meta_alignment_log2);
819 rtex->size = rtex->htile_offset + rtex->surface.meta_size;
858 if (rtex->htile_offset)
861 rtex->htile_offset, rtex->surface.meta_size,
994 if (rtex->htile_offset) {
998 rtex->htile_offset,
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| H A D | r600_pipe_common.h | 227 uint64_t htile_offset; member in struct:r600_texture
925 return tex->htile_offset && level == 0;
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| H A D | r600_state.c | 1077 surf->db_htile_data_base = rtex->htile_offset >> 8;
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| H A D | evergreen_state.c | 1435 uint64_t va = rtex->resource.gpu_address + rtex->htile_offset;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_texture.c | 580 tex->htile_offset = new_tex->htile_offset;
602 assert(!tex->htile_offset);
1044 tex->htile_offset = align(tex->size, tex->surface.htile_alignment);
1045 tex->size = tex->htile_offset + tex->surface.htile_size;
1094 if (tex->htile_offset) {
1097 tex->htile_offset,
1144 if (tex->htile_offset)
1147 tex->htile_offset, tex->surface.htile_size,
1351 if (tex->htile_offset) {
[all...] |
| H A D | si_pipe.h | 301 uint64_t htile_offset; member in struct:si_texture
1615 return tex->htile_offset && level == 0;
1621 assert(!tex->tc_compatible_htile || tex->htile_offset);
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| H A D | si_descriptors.c | 365 meta_va = tex->buffer.gpu_address + tex->htile_offset;
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| H A D | si_state.c | 2589 tex->htile_offset) >> 8;
2667 tex->htile_offset) >> 8;
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_image.c | 382 meta_va = gpu_address + image->htile_offset;
896 image->htile_offset = align64(image->size, image->planes[0].surface.htile_alignment);
899 image->clear_value_offset = image->htile_offset + image->planes[0].surface.htile_size;
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| H A D | radv_meta_clear.c | 1037 iview->image->offset + iview->image->htile_offset,
1043 iview->image->offset + iview->image->htile_offset,
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| H A D | radv_private.h | 1529 uint64_t htile_offset; member in struct:radv_image
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| H A D | radv_device.c | 4541 iview->image->htile_offset;
4606 iview->image->htile_offset;
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| H A D | radv_cmd_buffer.c | 4444 uint64_t offset = image->offset + image->htile_offset +
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_cmd_buffer.c | 5770 uint64_t htile_offset = ds_image->offset + ds_image->planes[0].surface.meta_offset; local in function:radv_cmd_buffer_begin_subpass
5774 radv_buffer_init(&htile_buffer, cmd_buffer->device, ds_image->bo, htile_size, htile_offset);
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