| /xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/ |
| H A D | brw_disasm.c | 535 if (inst->bits1.ia1.dest_subreg_nr)
536 format(file, ".%d", inst->bits1.ia1.dest_subreg_nr /
537 reg_type_size[inst->bits1.ia1.dest_reg_type]);
538 if (inst->bits1.ia1.dest_indirect_offset)
539 format(file, " %d", inst->bits1.ia1.dest_indirect_offset);
541 format(file, "<%d>", inst->bits1.ia1.dest_horiz_stride);
542 control(file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
716 inst->bits1.ia1.src0_reg_type,
717 inst->bits1.ia1.src0_reg_file,
718 inst->bits2.ia1
[all...] |
| H A D | brw_eu.h | 572 } ia1; member in union:brw_instruction::__anon0c137b5d020a
659 } ia1; member in union:brw_instruction::__anon0c137b5d090a
759 } ia1; member in union:brw_instruction::__anon0c137b5d100a
|
| H A D | brw_eu_emit.c | 128 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
133 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
136 insn->bits1.ia1.dest_horiz_stride = dest.hstride;
268 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/ |
| H A D | brw_disasm.c | 535 if (inst->bits1.ia1.dest_subreg_nr)
536 format(file, ".%d", inst->bits1.ia1.dest_subreg_nr /
537 reg_type_size[inst->bits1.ia1.dest_reg_type]);
538 if (inst->bits1.ia1.dest_indirect_offset)
539 format(file, " %d", inst->bits1.ia1.dest_indirect_offset);
541 format(file, "<%d>", inst->bits1.ia1.dest_horiz_stride);
542 control(file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
716 inst->bits1.ia1.src0_reg_type,
717 inst->bits1.ia1.src0_reg_file,
718 inst->bits2.ia1
[all...] |
| H A D | brw_eu.h | 572 } ia1; member in union:brw_instruction::__anon2bd0c611020a
659 } ia1; member in union:brw_instruction::__anon2bd0c611090a
759 } ia1; member in union:brw_instruction::__anon2bd0c611100a
|
| H A D | brw_eu_emit.c | 128 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
133 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
136 insn->bits1.ia1.dest_horiz_stride = dest.hstride;
268 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
|
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | brw_structs.h | 1152 } ia1; member in union:brw_instruction::__anon375735ed510a
1213 } ia1; member in union:brw_instruction::__anon375735ed560a
1294 } ia1; member in union:brw_instruction::__anon375735ed5b0a
|
| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | brw_structs.h | 1152 } ia1; member in union:brw_instruction::__anon5c4f4f86510a
1213 } ia1; member in union:brw_instruction::__anon5c4f4f86560a
1294 } ia1; member in union:brw_instruction::__anon5c4f4f865b0a
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | brw_structs.h | 1152 } ia1; member in union:brw_instruction::__anon4ebdd721510a
1213 } ia1; member in union:brw_instruction::__anon4ebdd721560a
1294 } ia1; member in union:brw_instruction::__anon4ebdd7215b0a
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | brw_structs.h | 1152 } ia1; member in union:brw_instruction::__anonbf125d3a510a
1213 } ia1; member in union:brw_instruction::__anonbf125d3a560a
1294 } ia1; member in union:brw_instruction::__anonbf125d3a5b0a
|
| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | brw_structs.h | 1147 } ia1; member in union:brw_instruction::__anonfa77c8dc510a
1208 } ia1; member in union:brw_instruction::__anonfa77c8dc560a
1289 } ia1; member in union:brw_instruction::__anonfa77c8dc5b0a
|
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen4_render.h | 2215 } ia1; member in union:gen4_instruction::__anon5ecad36c510a
2276 } ia1; member in union:gen4_instruction::__anon5ecad36c560a
2357 } ia1; member in union:gen4_instruction::__anon5ecad36c5b0a
|
| H A D | gen5_render.h | 2295 } ia1; member in union:gen5_instruction::__anon62d5648d510a
2356 } ia1; member in union:gen5_instruction::__anon62d5648d560a
2437 } ia1; member in union:gen5_instruction::__anon62d5648d5b0a
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen4_render.h | 2215 } ia1; member in union:gen4_instruction::__anon763174a0510a
2276 } ia1; member in union:gen4_instruction::__anon763174a0560a
2357 } ia1; member in union:gen4_instruction::__anon763174a05b0a
|
| H A D | gen5_render.h | 2295 } ia1; member in union:gen5_instruction::__anon7a3c05c1510a
2356 } ia1; member in union:gen5_instruction::__anon7a3c05c1560a
2437 } ia1; member in union:gen5_instruction::__anon7a3c05c15b0a
|