Searched refs:in0 (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/tests/
H A Dtest_glsl_to_tgsi_lifetime.cpp45 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
46 { TGSI_OPCODE_UADD, {out0}, {1,in0}, {}},
55 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
56 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
72 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
74 { TGSI_OPCODE_TEX, {out0}, {in0}, {1,2}},
88 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
90 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
106 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
109 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
[all...]
H A Dtest_glsl_to_tgsi_array_merge.cpp757 { TGSI_OPCODE_MOV , {MT(1, 1, WRITEMASK_XYZW)}, {MT(0, in0, "")}, {}, ARR()},
769 { TGSI_OPCODE_MOV , {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "")}, {}, ARR()},
782 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "")}, {}, ARR()},
800 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
823 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
842 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
861 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_W)}, {MT(0, in0, "")}, {}, ARR()},
902 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "x")}, {}, ARR()},
903 { TGSI_OPCODE_MOV, {MT(2, 2, WRITEMASK_XY)}, {MT(0, in0, "xy")}, {}, ARR()},
904 { TGSI_OPCODE_MOV, {MT(3, 3, WRITEMASK_X)}, {MT(0, in0, "
[all...]
H A Dst_tests_common.h111 const int in0 = -1; variable in typeref:typename:const int
/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/tests/
H A Dtest_glsl_to_tgsi_lifetime.cpp45 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
46 { TGSI_OPCODE_UADD, {out0}, {1,in0}, {}},
55 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
56 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
72 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
74 { TGSI_OPCODE_TEX, {out0}, {in0}, {1,2}},
88 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
90 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
106 { TGSI_OPCODE_MOV, {1}, {in0}, {}},
109 { TGSI_OPCODE_UADD, {2}, {1,in0}, {}},
[all...]
H A Dtest_glsl_to_tgsi_array_merge.cpp757 { TGSI_OPCODE_MOV , {MT(1, 1, WRITEMASK_XYZW)}, {MT(0, in0, "")}, {}, ARR()},
769 { TGSI_OPCODE_MOV , {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "")}, {}, ARR()},
782 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "")}, {}, ARR()},
800 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
823 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
842 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_Z)}, {MT(0, in0, "")}, {}, ARR()},
861 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_W)}, {MT(0, in0, "")}, {}, ARR()},
902 { TGSI_OPCODE_MOV, {MT(1, 1, WRITEMASK_X)}, {MT(0, in0, "x")}, {}, ARR()},
903 { TGSI_OPCODE_MOV, {MT(2, 2, WRITEMASK_XY)}, {MT(0, in0, "xy")}, {}, ARR()},
904 { TGSI_OPCODE_MOV, {MT(3, 3, WRITEMASK_X)}, {MT(0, in0, "
[all...]
H A Dst_tests_common.h111 const int in0 = -1; variable in typeref:typename:const int
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/
H A Dfreedreno_program.c151 struct ureg_src in0 = ureg_DECL_vs_input(ureg, 0); local in function:fd_prog_blit_vs
157 ureg_MOV(ureg, out0, in0);
/xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/tests/
H A Dvars_tests.cpp481 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
486 nir_store_var(b, vec, nir_load_var(b, in0), 1 << 0);
517 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
520 nir_copy_var(b, vec, in0);
522 /* This load will be replaced with one from in0. */
536 ASSERT_EQ(nir_intrinsic_get_var(load, 0), in0);
541 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/common/
H A Dsimdlib_128_avx.inl552 static SIMDINLINE Float SIMDCALL set_ps(float in3, float in2, float in1, float in0) argument
554 return _mm_set_ps(in3, in2, in1, in0);
557 static SIMDINLINE Integer SIMDCALL set_epi32(int in3, int in2, int in1, int in0) argument
559 return _mm_set_epi32(in3, in2, in1, in0);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/rasterizer/common/
H A Dsimdlib_128_avx.inl552 static SIMDINLINE Float SIMDCALL set_ps(float in3, float in2, float in1, float in0) argument
554 return _mm_set_ps(in3, in2, in1, in0);
557 static SIMDINLINE Integer SIMDCALL set_epi32(int in3, int in2, int in1, int in0) argument
559 return _mm_set_epi32(in3, in2, in1, in0);
/xsrc/external/mit/MesaLib/dist/src/compiler/nir/tests/
H A Dvars_tests.cpp1079 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
1084 nir_store_var(b, vec, nir_load_var(b, in0), 1 << 0);
1115 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
1118 nir_copy_var(b, vec, in0);
1120 /* This load will be replaced with one from in0. */
1134 ASSERT_EQ(nir_intrinsic_get_var(load, 0), in0);
1139 nir_variable *in0 = create_ivec2(nir_var_mem_ssbo, "in0"); local in function:TEST_F
[all...]
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_sdvo_regs.h181 uint16_t in0, in1; member in struct:i830_sdvo_in_out_map
H A Di830_sdvo.c1143 in_out.in0 = dev_priv->controlled_output;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/drivers/freedreno/
H A Dir3-notes.rst67 inputdce198 [shape=record,label="inputs|<in0> i0.x|<in1> i0.y|<in2> i0.z|<in4> i1.x|<in5> i1.y|<in6> i1.z"];
76 inputdce198:<in0>:w -> instrdceb60:<src0>
/xsrc/external/mit/MesaLib/dist/docs/drivers/freedreno/
H A Dir3-notes.rst67 inputdce198 [shape=record,label="inputs|<in0> i0.x|<in1> i0.y|<in2> i0.z|<in4> i1.x|<in5> i1.y|<in6> i1.z"];
76 inputdce198:<in0>:w -> instrdceb60:<src0>

Completed in 20 milliseconds