| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i965_3d.c | 38 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_upload_invariant_states
50 OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | ((ivb ? 4 : 3) - 2));
54 if (ivb)
283 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_upload_vs_state
285 OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | ((ivb ? 7 : 5) - 2));
290 if (ivb) {
|
| H A D | i965_render.c | 2634 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_composite_wm_constants
2636 OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | ((ivb ? 7 : 5) - 2));
2641 if (ivb) {
2845 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_emit_composite_state
2853 if (ivb) {
2885 if (ivb) {
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i965_3d.c | 38 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_upload_invariant_states
50 OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | ((ivb ? 4 : 3) - 2));
54 if (ivb)
283 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_upload_vs_state
285 OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | ((ivb ? 7 : 5) - 2));
290 if (ivb) {
|
| H A D | i965_render.c | 2634 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_composite_wm_constants
2636 OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | ((ivb ? 7 : 5) - 2));
2641 if (ivb) {
2845 Bool ivb = INTEL_INFO(intel)->gen >= 070; local in function:gen6_emit_composite_state
2853 if (ivb) {
2885 if (ivb) {
|
| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 21.1.2.rst | 40 - [iris,i965][hsw,ivb,snb,bdw][bisected][regression] wflinfo crashes
41 - [iris,i965][hsw,ivb,snb,bdw][bisected][regression] wflinfo crashes
|
| H A D | 19.0.3.rst | 35 - [ivb] mesa 19.0.0 breaks rendering in kitty
|
| H A D | 17.1.0.rst | 28 - OpenGL 4.2 on i965/ivb
35 - GL_ARB_shader_precision on i965/ivb
40 - GL_ARB_vertex_attrib_64bit on i965/ivb
|
| H A D | 10.0.5.rst | 67 [ivb/hsw] batch overwritten with garbage
|
| H A D | 10.1.1.rst | 54 [ivb/hsw] batch overwritten with garbage
|
| H A D | 9.1.3.rst | 46 [ivb] Mesa 9.1 performance regression on KWin's Lanczos shader
|
| H A D | 8.0.5.rst | 53 [ivb gt1] Severe image corruption and GPU Hang, too many PS threads
|
| H A D | 17.3.0.rst | 199 - [ivb byt hsw] piglit.spec.arb_indirect_parameters.tf-count-arrays
|
| H A D | 17.0.0.rst | 213 [byt,ivb,snb] ES3-CTS.gtf.GL3Tests.shadow regression
|
| H A D | 18.0.0.rst | 117 - [ivb byt hsw] piglit.spec.arb_indirect_parameters.tf-count-arrays
|
| H A D | 21.2.0.rst | 175 - [iris,i965][hsw,ivb,snb,bdw][bisected][regression] wflinfo crashes
176 - [iris,i965][hsw,ivb,snb,bdw][bisected][regression] wflinfo crashes
193 - [ivb,hsw][i965][bisected] dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darrayshadow_vertex failing
1768 - crocus/gen8: limit vertex buffer workarounds to ivb
|
| H A D | 20.0.0.rst | 104 - [regression][bisected][ivb/byt] crucible test
|
| H A D | 19.1.0.rst | 215 - [ivb] mesa 19.0.0 breaks rendering in kitty
|
| H A D | 20.3.0.rst | 138 - \[ivb,hsw,byt,bsw][i965][bisected\] anv_reloc_list_add: Assertion failure
|
| /xsrc/external/mit/MesaLib/dist/src/intel/common/ |
| H A D | intel_l3_config.c | 63 DECLARE_L3_LIST(ivb);
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_vec4_generator.cpp | 742 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; local in function:generate_tcs_get_instance_id
756 const int mask = ivb ? INTEL_MASK(22, 16) : INTEL_MASK(23, 17);
757 const int shift = ivb ? 16 : 17;
1062 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; local in function:generate_tcs_create_barrier_header
1076 brw_imm_ud(ivb ? INTEL_MASK(15, 12) : INTEL_MASK(16, 13)));
1079 brw_SHL(p, m0_2, get_element_ud(dst, 2), brw_imm_ud(ivb ? 12 : 11));
|
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_vec4_generator.cpp | 741 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; local in function:generate_tcs_get_instance_id
755 const int mask = ivb ? INTEL_MASK(22, 16) : INTEL_MASK(23, 17);
756 const int shift = ivb ? 16 : 17;
1061 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; local in function:generate_tcs_create_barrier_header
1075 brw_imm_ud(ivb ? INTEL_MASK(15, 12) : INTEL_MASK(16, 13)));
1078 brw_SHL(p, m0_2, get_element_ud(dst, 2), brw_imm_ud(ivb ? 12 : 11));
|