Searched refs:lowering (Results 1 - 25 of 60) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/docs/nir/
H A Dindex.rst7 functions, optimization passes, and lowering passes for building a compiler
H A Dtex.rst57 Texture instruction lowering
61 texture operations, NIR provides a quite powerful lowering pass which is able
/xsrc/external/mit/MesaLib/dist/src/compiler/glsl/
H A Dlower_int64.cpp130 * Determine if a particular type of lowering should occur
132 #define lowering(x) (this->lower & x) macro
357 if (lowering(SIGN64)) {
363 if (lowering(DIV64)) {
373 if (lowering(MOD64)) {
383 if (lowering(MUL64)) {
H A Dlower_instructions.cpp29 * of the most common cases, allowing the lowering code to be implemented once
187 * Determine if a particular type of lowering should occur
189 #define lowering(x) (this->lower & x) macro
346 if ((lowering(FDIV_TO_MUL_RCP) && ir->type->is_float_16_32()) ||
347 (lowering(DDIV_TO_MUL_RCP) && ir->type->is_double()))
353 if (lowering(DOPS_TO_DFRAC) && ir->type->is_double())
519 if (!lowering(INSERT_TO_SHIFTS)) {
588 if (lowering(DFREXP_DLDEXP_TO_ARITH))
1519 if (lowering(CARRY_TO_ARITH))
1770 if (lowering(SUB_TO_ADD_NE
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/xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/
H A Dlower_int64.cpp130 * Determine if a particular type of lowering should occur
132 #define lowering(x) (this->lower & x) macro
357 if (lowering(SIGN64)) {
363 if (lowering(DIV64)) {
373 if (lowering(MOD64)) {
383 if (lowering(MUL64)) {
H A Dlower_instructions.cpp29 * of the most common cases, allowing the lowering code to be implemented once
180 * Determine if a particular type of lowering should occur
182 #define lowering(x) (this->lower & x) macro
339 if ((lowering(FDIV_TO_MUL_RCP) && ir->type->is_float()) ||
340 (lowering(DDIV_TO_MUL_RCP) && ir->type->is_double()))
346 if (lowering(DOPS_TO_DFRAC) && ir->type->is_double())
512 if (!lowering(INSERT_TO_SHIFTS)) {
581 if (lowering(DFREXP_DLDEXP_TO_ARITH))
1511 if (lowering(CARRY_TO_ARITH))
1743 if (lowering(SUB_TO_ADD_NE
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/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D19.1.5.rst46 - radv: Do non-uniform lowering before bool lowering.
H A D17.2.5.rst47 - cherry-ignore: radv: copy indirect lowering settings from radeonsi
117 - radv: copy indirect lowering settings from radeonsi
H A D19.1.6.rst58 lowering is enabled
59 - intel/compiler: Request bitfield_reverse lowering on pre-Gen7
H A D10.1.4.rst65 - nv50/ir: fix integer mul lowering for u32 x u32 -> high u32
H A D12.0.6.rst77 - nir/lower_tex: Add support for lowering coordinate offsets
78 - i965/nir: Enable NIR lowering of txf and rect offsets
H A D13.0.1.rst139 - radeonsi: fix BFE/BFI lowering for GLSL semantics
140 - glsl: fix lowering of UBO references of named blocks
H A D19.1.3.rst69 - spirv: Fix stride calculation when lowering Workgroup to offsets
108 - nir,intel: Add support for lowering 64-bit nir_opt_extract\_\*
H A D19.3.2.rst79 - intel/fs: Fix lowering of dword multiplication by 16-bit constant
80 - intel/vec4: Fix lowering of multiplication by 16-bit constant
H A D21.3.1.rst49 - ir3/lower_pcopy: Fix shr.b illegal copy lowering
84 - intel/fs: fix shader call lowering pass
H A D21.3.6.rst82 - intel/fs: Take into account region strides during SIMD lowering decision of SHUFFLE.
103 - intel/nir: fix shader call lowering
H A D9.2.4.rst55 - glsl: Fix lowering of direct assignment in lower_clip_distance.
H A D10.3.3.rst152 - freedreno: add texcoord clamp support to lowering
155 - freedreno/lowering: fix token calculation for lowering
H A D17.2.6.rst68 - cherry-ignore: intel/nir: Use the correct indirect lowering masks in
71 MUL lowering
126 - intel/fs: Fix integer multiplication lowering for src/dst hazards
H A D19.0.0.rst446 - nir: add lowering for ffloor
483 - spirv/vtn: handle variable pointers without offset lowering
485 - nir: handle shared pointers in lowering indirect derefs.
743 - intel: Simplify the half-float packing in image load/store lowering.
747 lowering."
748 - nir: Move intel's half-float image store lowering to to nir_format.h.
770 - vc4: Reuse nir_format_convert.h in our blend lowering.
772 - nir: Fix clamping of uints for image store lowering.
821 - v3d: Use the core tex lowering.
1014 - intel/fs: Introduce regioning lowering pas
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H A D19.1.0.rst478 - panfrost/midgard: Expand fge lowering to more types
515 - panfrost/mdg: Use shared fsign lowering
590 - nir: add rcp(w) lowering for gl_FragCoord
764 - radv: Add non-uniform indexing lowering.
784 - radv: Add ycbcr lowering pass.
785 - radv: Run the new ycbcr lowering pass.
920 - intel/fs: Don't loop when lowering CS intrinsics
921 - intel/fs: Use NIR_PASS_V when lowering CS intrinsics
1169 - st/mesa: add support for lowering fp64/int64 for nir drivers
1374 - nir: Move panfrost's isign lowering t
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H A D20.0.0.rst299 - pan/midgard: Add LOD bias/clamp lowering
301 - pan/midgard: Enable LOD lowering only on buggy chips
382 - pan/midgard: Enable lower_(un)pack\_\* lowering
592 - panfrost/midgard: Add missing lowering passes for type/size
635 - intel/fs: Fix lowering of dword multiplication by 16-bit constant
636 - intel/vec4: Fix lowering of multiplication by 16-bit constant
805 - nir: add 64-bit ufind_msb lowering support. (v2)
806 - nouveau: request ufind_msb64 lowering in the frontend.
818 - gallium: add nir lowering passes for the draw pipe stages. (v2)
871 - llvmpipe: fix some integer instruction lowering
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H A D10.6.6.rst106 - i965/fs: Split VGRFs after lowering pull constants
H A D11.0.7.rst114 - nir: fix typo in idiv lowering, causing large-udiv-udiv failures
H A D11.1.2.rst63 - glsl: fix subroutine lowering reusing actual parmaters

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