Searched refs:output_reg (Results 1 - 16 of 16) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_hdmi.c39 uint32_t output_reg; member in struct:i830_hdmi_priv
95 OUTREG(dev_priv->output_reg, sdvox);
96 POSTING_READ(dev_priv->output_reg);
109 temp = INREG(dev_priv->output_reg);
110 OUTREG(dev_priv->output_reg, temp & ~SDVO_ENABLE);
112 temp = INREG(dev_priv->output_reg);
113 OUTREG(dev_priv->output_reg, temp | SDVO_ENABLE);
125 dev_priv->save_SDVO = INREG(dev_priv->output_reg);
136 OUTREG(dev_priv->output_reg, dev_priv->save_SDVO);
169 switch (dev_priv->output_reg) {
330 i830_hdmi_init(ScrnInfoPtr pScrn,int output_reg) argument
[all...]
H A Di830.h761 void i830_hdmi_init(ScrnInfoPtr pScrn, int output_reg);
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_vs_visitor.cpp67 output_reg[varying][0].type = reg.type;
113 src_reg(output_reg[clip_vertex][0]),
150 output_reg[VARYING_SLOT_CLIP_DIST0][0] =
152 output_reg[VARYING_SLOT_CLIP_DIST1][0] =
157 emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST0][0], 0);
158 emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST1][0], 4);
H A Dbrw_vec4_visitor.cpp1158 if (output_reg[VARYING_SLOT_POS][0].file == BAD_FILE)
1162 src_reg pos = src_reg(output_reg[VARYING_SLOT_POS][0]);
1166 output_reg[BRW_VARYING_SLOT_NDC][0] = ndc;
1187 output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE ||
1196 src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ][0]);
1203 if (output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE) {
1207 emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
1212 if (output_reg[VARYING_SLOT_CLIP_DIST1][0].file != BAD_FILE) {
1214 emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
1230 output_reg[BRW_VARYING_SLOT_ND
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H A Dgen6_gs_visitor.cpp415 reg.type = output_reg[varying][0].type;
689 data.type = output_reg[varying][0].type;
H A Dbrw_vec4.h119 dst_reg output_reg[VARYING_SLOT_TESS_MAX][4]; member in class:brw::vec4_visitor
H A Dbrw_vec4_nir.cpp451 output_reg[varying][c] = dst_reg(src);
458 output_reg[varying][c] = dst_reg(src);
463 output_reg[varying + 1][c] = byte_offset(dst_reg(src), REG_SIZE);
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_visitor.cpp1063 if (output_reg[VARYING_SLOT_POS][0].file == BAD_FILE)
1067 src_reg pos = src_reg(output_reg[VARYING_SLOT_POS][0]);
1071 output_reg[BRW_VARYING_SLOT_NDC][0] = ndc;
1092 output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE ||
1101 src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ][0]);
1108 if (output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE) {
1112 emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
1117 if (output_reg[VARYING_SLOT_CLIP_DIST1][0].file != BAD_FILE) {
1119 emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
1135 output_reg[BRW_VARYING_SLOT_ND
[all...]
H A Dbrw_vec4_vs_visitor.cpp67 output_reg[varying][0].type = reg.type;
H A Dgfx6_gs_visitor.cpp413 reg.type = output_reg[varying][0].type;
650 data.type = output_reg[varying][0].type;
H A Dbrw_vec4.h122 dst_reg output_reg[VARYING_SLOT_TESS_MAX][4]; member in class:brw::vec4_visitor
H A Dbrw_vec4_nir.cpp432 output_reg[varying][c] = dst_reg(src);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_program_tex.c165 struct rc_dst_register output_reg = inst->U.I.DstReg; local in function:radeonTransformTEX
247 inst_cmp->U.I.DstReg = output_reg;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_program_tex.c165 struct rc_dst_register output_reg = inst->U.I.DstReg; local in function:radeonTransformTEX
247 inst_cmp->U.I.DstReg = output_reg;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/
H A Dsvga_tgsi_vgpu10.c6687 unsigned output_reg = emit->fs.color_out_index[i]; local in function:emit_broadcast_color_instructions
6689 make_dst_output_reg(output_reg);
6694 emit->info.output_semantic_name[output_reg] = TGSI_SEMANTIC_COLOR;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/svga/
H A Dsvga_tgsi_vgpu10.c10607 unsigned output_reg = emit->fs.color_out_index[i]; local in function:emit_broadcast_color_instructions
10609 make_dst_output_reg(output_reg);
10614 emit->info.output_semantic_name[output_reg] = TGSI_SEMANTIC_COLOR;

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