Searched refs:pHWDE (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dvb_i2c.c46 /*char I2CAccessBuffer(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl I2CCntl, ULONG DevAddr, ULONG Offset, PUCHAR pBuffer, ULONG ulSize); */
47 char vGetEDIDExtensionBlocks(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, PUCHAR pjBuffer, ULONG ulBufferSize);
48 char vGetEnhancedEDIDBlock(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, ULONG ulBlockID, ULONG ulBlockTag, PUCHAR pjBuffer, ULONG ulBufferSize);
50 char I2COpen (PXGI_HW_DEVICE_INFO pHWDE,ULONG ulI2CEnable, ULONG ulChannelID, PI2CControl pI2CControl);
51 char I2CAccess(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
52 BOOLEAN I2CNull( PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
53 BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
54 BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
55 BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
56 BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE,PI2CContro
201 I2CAccessBuffer(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl,ULONG ulDevAddr,ULONG ulOffset,PUCHAR pBuffer,ULONG ulSize) argument
361 vGetEDIDExtensionBlocks(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2C,PUCHAR pjBuffer,ULONG ulBufferSize) argument
481 vGetEnhancedEDIDBlock(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2C,ULONG ulBlockID,ULONG ulBlockTag,PUCHAR pjBuffer,ULONG ulBufferSize) argument
531 I2COpen(PXGI_HW_DEVICE_INFO pHWDE,ULONG ulI2CEnable,ULONG ulChannelID,PI2CControl pI2CControl) argument
571 I2CAccess(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl) argument
648 I2CNull(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl) argument
686 I2CRead(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl) argument
737 I2CWrite(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl) argument
803 ResetI2C(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl) argument
829 Ack(PXGI_HW_DEVICE_INFO pHWDE,bool fPut) argument
910 NoAck(PXGI_HW_DEVICE_INFO pHWDE) argument
953 Start(PXGI_HW_DEVICE_INFO pHWDE) argument
1012 Stop(PXGI_HW_DEVICE_INFO pHWDE) argument
1056 WriteUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE,UCHAR cData) argument
1103 ReadUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE,PUCHAR pBuffer) argument
1176 vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1226 vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1279 bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE) argument
1319 bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE) argument
1359 vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE) argument
1399 vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1434 vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1468 bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE) argument
1490 bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE) argument
1518 vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1542 vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1566 bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE) argument
1588 bReadDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE) argument
1602 vWriteClockLine(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1614 vWriteDataLine(PXGI_HW_DEVICE_INFO pHWDE,UCHAR data) argument
1626 bReadClockLine(PXGI_HW_DEVICE_INFO pHWDE) argument
1640 bReadDataLine(PXGI_HW_DEVICE_INFO pHWDE) argument
1692 vGetEDID_1(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2C,PUCHAR pjBuffer,ULONG ulBufferSize) argument
1768 vGetEDID_2(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2C,PUCHAR pjBuffer,ULONG ulBufferSize) argument
1828 bGetEDID(PXGI_HW_DEVICE_INFO pHWDE,ULONG ulChannelID,PUCHAR pjEDIDBuffer,ULONG ulBufferSize) argument
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H A Dvb_i2c.h171 /*extern char I2CAccessBuffer(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl I2CCntl, ULONG DevAddr, ULONG Offset, PUCHAR pBuffer, ULONG ulSize);
173 extern char vGetEDIDExtensionBlocks(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, PUCHAR pjBuffer, ULONG ulBufferSize);
174 extern char vGetEnhancedEDIDBlock(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, ULONG ulBlockID, ULONG ulBlockTag, PUCHAR pjBuffer, ULONG ulBufferSize);
177 extern char I2COpen (PXGI_HW_DEVICE_INFO pHWDE,ULONG ulI2CEnable, ULONG ulChannelID, PI2CControl pI2CControl);
178 extern char I2CAccess(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
179 extern BOOLEAN I2CNull( PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
180 extern BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
181 extern BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
182 extern BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
183 extern BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE,PI2CContro
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