Searched refs:ps_offset (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/
H A Detnaviv_internal.h119 uint32_t ps_offset; member in struct:etna_specs
H A Detnaviv_screen.c842 screen->specs.ps_offset = 0;
857 screen->specs.ps_offset = 0x8000 + 0x1000;
863 screen->specs.ps_offset = 0xD000; /* like vivante driver */
867 screen->specs.ps_offset = 0x6000;
H A Detnaviv_emit.c633 etna_set_state_multi(stream, screen->specs.ps_offset,
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_pipeline.c3240 unsigned ps_offset = 0; local in function:radv_pipeline_generate_ps_inputs
3245 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true, false);
3246 ++ps_offset;
3255 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true, false);
3257 ps_input_cntl[ps_offset] = offset_to_ps_input(AC_EXP_PARAM_DEFAULT_VAL_0000, true, false);
3258 ++ps_offset;
3264 ps_input_cntl[ps_offset] = val;
3265 ps_offset++;
3273 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, false, false);
3274 ++ps_offset;
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/
H A Detnaviv_internal.h114 uint32_t ps_offset; member in struct:etna_specs
H A Detnaviv_screen.c772 screen->specs.ps_offset = 0;
787 screen->specs.ps_offset = 0x8000 + 0x1000;
793 screen->specs.ps_offset = 0xD000; /* like vivante driver */
797 screen->specs.ps_offset = 0x6000;
H A Detnaviv_emit.c657 etna_set_state_multi(stream, ctx->specs.ps_offset,
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_pipeline.c4936 unsigned ps_offset = 0; local in function:radv_pipeline_generate_ps_inputs
4941 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true, false, false);
4942 ++ps_offset;
4949 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true, false, false);
4951 ps_input_cntl[ps_offset] =
4953 ++ps_offset;
4959 ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true, false, false);
4961 ps_input_cntl[ps_offset] =
4963 ++ps_offset;
4969 ps_input_cntl[ps_offset]
[all...]
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Devergreen_state.h345 uint32_t vs_offset, uint32_t ps_offset,
H A Dr600_state.h338 uint32_t vs_offset, uint32_t ps_offset,
H A Dr600_exa.c51 uint32_t vs_offset, uint32_t ps_offset,
138 accel_state->ps_mc_addr = ps_offset;
162 ps_offset;
47 R600SetAccelState(ScrnInfoPtr pScrn,struct r600_accel_object * src0,struct r600_accel_object * src1,struct r600_accel_object * dst,uint32_t vs_offset,uint32_t ps_offset,int rop,Pixel planemask) argument
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Devergreen_state.h343 uint32_t vs_offset, uint32_t ps_offset,
H A Dr600_state.h314 uint32_t vs_offset, uint32_t ps_offset,
H A Dr600_exa.c50 uint32_t vs_offset, uint32_t ps_offset,
115 accel_state->ps_mc_addr = ps_offset;
46 R600SetAccelState(ScrnInfoPtr pScrn,struct r600_accel_object * src0,struct r600_accel_object * src1,struct r600_accel_object * dst,uint32_t vs_offset,uint32_t ps_offset,int rop,Pixel planemask) argument

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