Searched refs:rd (Results 1 - 25 of 41) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_sched_gm107.h17 } rd, wr; member in struct:nv50_ir::SchedDataCalculatorGM107::RegScores
28 rd.r[i] += delta;
32 rd.p[i] += delta;
35 rd.c += delta;
40 memset(&rd, 0, sizeof(rd));
58 return getLatest(rd);
71 rd.r[i] = MAX2(rd.r[i], that->rd
[all...]
H A Dnv50_ir_emit_nvc0.cpp422 if ((s == 2) && ((code[0] & 0x7) == 2)) // LIMM: 3rd src == dst
3040 } rd, wr; member in struct:nv50_ir::SchedDataCalculator::RegScores
3052 rd.r[i] += delta;
3056 rd.p[i] += delta;
3059 rd.c += delta;
3072 memset(&rd, 0, sizeof(rd));
3092 return getLatest(rd);
3116 rd.r[i] = MAX2(rd
[all...]
H A Dnv50_ir_emit_gm107.cpp3835 uint8_t st, yl, wr, rd, wt, ru; local in function:nv50_ir::SchedDataCalculatorGM107::printSchedInfo
3840 rd = (insn->sched & 0x000700) >> 8;
3844 INFO("cycle %i, (st 0x%x, yl 0x%x, wr 0x%x, rd 0x%x, wt 0x%x, ru 0x%x)\n",
3845 cycle, st, yl, wr, rd, wt, ru);
3923 score->rd.r[r] = ready;
3928 score->rd.p[a] = cycle + 13;
3931 score->rd.c = ready;
3948 ready = MAX2(ready, score->rd.r[r]);
3951 ready = MAX2(ready, score->rd.p[a]);
3954 ready = MAX2(ready, score->rd
3997 int wr, rd; local in function:nv50_ir::SchedDataCalculatorGM107::setDelay
4231 int rd = getRdDepBar(it->insn); local in function:nv50_ir::SchedDataCalculatorGM107::insertBarriers
4283 int wr, rd, wt; local in function:nv50_ir::SchedDataCalculatorGM107::insertBarriers
[all...]
/xsrc/external/mit/libXpm/dist/test/
H A DXpmRead.c149 ssize_t rd; local in function:TestReadFileToBuffer
155 while ((rd = read(fd, readbuf, sizeof(readbuf))) > 0) {
156 g_assert_cmpmem(b, rd, readbuf, rd);
157 b += rd;
H A DXpmWrite.c299 ssize_t rd; local in function:TestWriteFileFromBuffer
303 while ((rd = read(fd, readbuf, sizeof(readbuf))) > 0) {
304 g_assert_cmpmem(b, rd, readbuf, rd);
305 b += rd;
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_cmdbuf.h47 #define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags) \
56 bo, rd, wd, flags); \
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_cmdbuf.h47 #define OUT_BATCH_RELOC(bo, offset, rd, wd, flags) \
56 bo, rd, wd, flags); \
/xsrc/external/mit/MesaLib.old/dist/src/glx/
H A Dglxhash.c97 #define HASH_RANDOM_DECL struct random_data rd; int32_t rv; char rs[256]
100 (void) memset(&rd, 0, sizeof(rd)); \
101 (void) initstate_r(seed, rs, sizeof(rs), &rd); \
103 #define HASH_RANDOM ((void) random_r(&rd, &rv), rv)
/xsrc/external/mit/MesaLib/dist/src/glx/
H A Dglxhash.c97 #define HASH_RANDOM_DECL struct random_data rd; int32_t rv; char rs[256]
100 (void) memset(&rd, 0, sizeof(rd)); \
101 (void) initstate_r(seed, rs, sizeof(rs), &rd); \
103 #define HASH_RANDOM ((void) random_r(&rd, &rv), rv)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_emit_gm107.cpp3725 } rd, wr; member in struct:nv50_ir::SchedDataCalculatorGM107::RegScores
3736 rd.r[i] += delta;
3740 rd.p[i] += delta;
3743 rd.c += delta;
3748 memset(&rd, 0, sizeof(rd));
3766 return getLatest(rd);
3779 rd.r[i] = MAX2(rd.r[i], that->rd
3912 uint8_t st, yl, wr, rd, wt, ru; local in function:nv50_ir::SchedDataCalculatorGM107::printSchedInfo
4074 int wr, rd; local in function:nv50_ir::SchedDataCalculatorGM107::setDelay
4308 int rd = getRdDepBar(it->insn); local in function:nv50_ir::SchedDataCalculatorGM107::insertBarriers
4360 int wr, rd, wt; local in function:nv50_ir::SchedDataCalculatorGM107::insertBarriers
[all...]
H A Dnv50_ir_emit_nvc0.cpp424 if ((s == 2) && ((code[0] & 0x7) == 2)) // LIMM: 3rd src == dst
3032 } rd, wr; member in struct:nv50_ir::SchedDataCalculator::RegScores
3044 rd.r[i] += delta;
3048 rd.p[i] += delta;
3051 rd.c += delta;
3064 memset(&rd, 0, sizeof(rd));
3084 return getLatest(rd);
3108 rd.r[i] = MAX2(rd
[all...]
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dr600_state.h203 #define RELOC_BATCH(bo, rd, wd) \
207 _ret = radeon_cs_write_reloc(info->cs, (bo), (rd), (wd), 0); \
224 #define RELOC_BATCH(bo, wd, rd) do {} while(0)
H A Dradeon_macros.h176 #define EMIT_OFFSET(reg, value, pPix, rd, wd) do { \
180 OUT_RELOC(driver_priv->bo, (rd), (wd)); \
H A Devergreen_state.h239 #define RELOC_BATCH(bo, rd, wd) \
242 _ret = radeon_cs_write_reloc(info->cs, (bo), (rd), (wd), 0); \
/xsrc/external/mit/libXt/dist/
H A DREADME.md28 3rd Edition (1993, covers X11R5/Motif 1.2)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/
H A Dglossary.rst26 This term is used as the name of the "3rd coordinate" of a resource.
/xsrc/external/mit/MesaLib/dist/docs/gallium/
H A Dglossary.rst26 This term is used as the name of the "3rd coordinate" of a resource.
/xsrc/external/mit/MesaLib/dist/src/freedreno/decode/scripts/
H A Danalyze.lua7 -- cffdump --script scripts/analyze.lua a320/quad-flat-*.rd a420/quad-flat-*.rd
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Devergreen_state.h235 #define RELOC_BATCH(bo, rd, wd) \
238 _ret = radeon_cs_write_reloc(info->cs, (bo), (rd), (wd), 0); \
H A Dr600_state.h196 #define RELOC_BATCH(bo, rd, wd) \
199 _ret = radeon_cs_write_reloc(info->cs, (bo), (rd), (wd), 0); \
/xsrc/external/mit/MesaLib.old/dist/docs/specs/
H A DMESA_configless_context.spec57 Add the following to the 3rd paragraph:
/xsrc/external/mit/MesaLib/dist/docs/_extra/specs/
H A DMESA_configless_context.spec57 Add the following to the 3rd paragraph:
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/lib/
H A Dgm107.asm30 sched (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 rd 0x1 wt 0x1)
34 sched (st 0x6 wt 0x2) (st 0x6 wr 0x0 rd 0x1 wt 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x2)
82 sched (st 0x6 wr 0x1 rd 0x2 wt 0x2) (st 0x2 wt 0x5) (st 0x6 wr 0x0 rd 0x1 wt 0x2)
86 sched (st 0xf wr 0x1 rd 0x2 wt 0x2) (st 0x6 wr 0x0 wt 0x5) (st 0xd wt 0x3)
323 sched (st 0xd) (st 0xd wr 0x1) (st 0xd wr 0x1 rd 0x0 wt 0x3)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/lib/
H A Dgm107.asm30 sched (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 rd 0x1 wt 0x1)
34 sched (st 0x6 wt 0x2) (st 0x6 wr 0x0 rd 0x1 wt 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x2)
82 sched (st 0x6 wr 0x1 rd 0x2 wt 0x2) (st 0x2 wt 0x5) (st 0x6 wr 0x0 rd 0x1 wt 0x2)
86 sched (st 0xf wr 0x1 rd 0x2 wt 0x2) (st 0x6 wr 0x0 wt 0x5) (st 0xd wt 0x3)
323 sched (st 0xd) (st 0xd wr 0x1) (st 0xd wr 0x1 rd 0x0 wt 0x3)
/xsrc/external/mit/libpciaccess/dist/src/
H A Dhurd_pci.c436 ssize_t rd; local in function:pci_device_hurd_read_rom
447 rd = read(romfd, buffer, dev->rom_size);
448 if (rd != dev->rom_size) {

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