Searched refs:reg_b (Results 1 - 6 of 6) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 975 def_reg.reg_b += offset;
976 op_reg.reg_b += offset;
987 bool can_increase = def_reg.reg_b % MIN2(next, max_align) == 0 &&
990 can_increase = op_reg.reg_b % MIN2(next, max_align) == 0;
1249 if (copy.bytes == 3 && (copy.def.physReg().reg_b % 4 <= 1) &&
1250 (copy.def.physReg().reg_b % 4) == (copy.op.physReg().reg_b % 4)) {
1255 op.reg_b &= ~0x3;
1256 def.reg_b &= ~0x3;
1265 op.reg_b
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| H A D | aco_validate.cpp | 891 op.physReg().reg_b + op.bytes() > (256 + program->config->num_vgprs) * 4) ||
920 def.physReg().reg_b + def.bytes() > (256 + program->config->num_vgprs) * 4) ||
958 if (regs[reg.reg_b + i]) {
961 i, tmp.id(), regs[reg.reg_b + i]);
963 regs[reg.reg_b + i] = tmp.id();
976 if (regs[reg.reg_b + i])
980 tmp.id(), regs[reg.reg_b + i]);
1006 regs[reg.reg_b + i] = tmp.id();
1017 regs[reg.reg_b + i] = 0;
1027 regs[op.physReg().reg_b
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| H A D | aco_register_allocation.cpp | 108 reg.reg_b += 4;
114 reg.reg_b -= 4;
249 for (PhysReg i = start; i.reg_b < start.reg_b + num_bytes; i = PhysReg(i + 1)) {
255 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++) {
337 for (PhysReg i = start; i.reg_b < start.reg_b + num_bytes; i = PhysReg(i + 1)) {
341 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++)
935 res.reg_b += i;
1022 reg.reg_b
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| H A D | aco_ir.h | 434 explicit constexpr PhysReg(unsigned r) : reg_b(r << 2) {}
435 constexpr unsigned reg() const { return reg_b >> 2; }
436 constexpr unsigned byte() const { return reg_b & 0x3; }
438 constexpr bool operator==(PhysReg other) const { return reg_b == other.reg_b; }
439 constexpr bool operator!=(PhysReg other) const { return reg_b != other.reg_b; }
440 constexpr bool operator<(PhysReg other) const { return reg_b < other.reg_b; }
444 res.reg_b
448 uint16_t reg_b = 0; member in struct:aco::PhysReg
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| H A D | test_to_hw_instr.cpp | 39 v0_hi.reg_b += 2;
40 v1_hi.reg_b += 2;
41 v0_b1.reg_b += 1;
42 v1_b1.reg_b += 1;
43 v0_b3.reg_b += 3;
44 v1_b3.reg_b += 3;
372 v0_hi.reg_b += 2;
373 v0_b1.reg_b += 1;
374 v1_hi.reg_b += 2;
680 v0_b3.reg_b
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| H A D | iris_query.c | 366 unsigned reg_a, unsigned reg_b)
372 math[2] = _MI_ALU2(LOAD, MI_ALU_SRCB, reg_b);
365 emit_alu_add(struct iris_batch * batch,unsigned dst_reg,unsigned reg_a,unsigned reg_b) argument
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