Searched refs:reg_map (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/v3d/
H A Dv3dx_simulator.c149 static const uint32_t reg_map[] = { local in function:v3dX
165 if (args->param < ARRAY_SIZE(reg_map) && reg_map[args->param]) {
166 args->value = V3D_READ(reg_map[args->param]);
/xsrc/external/mit/MesaLib/dist/src/etnaviv/drm-shim/
H A Detnaviv_noop.c39 const uint64_t *reg_map; member in struct:etna_shim_gpu
45 .reg_map = (const uint64_t[]){
72 .reg_map = (const uint64_t[]){
99 .reg_map = (const uint64_t[]){
126 .reg_map = (const uint64_t[]){
198 gp->value = shim_gpu->reg_map[gp->param];
/xsrc/external/mit/MesaLib/dist/src/broadcom/drm-shim/
H A Dv3dx.c264 static const uint32_t reg_map[] = { local in function:v3dX
280 if (gp->param < ARRAY_SIZE(reg_map) && reg_map[gp->param]) {
281 gp->value = V3D_READ(reg_map[gp->param]);
/xsrc/external/mit/MesaLib/dist/src/broadcom/simulator/
H A Dv3dx_simulator.c249 static const uint32_t reg_map[] = { local in function:v3dX
274 if (args->param < ARRAY_SIZE(reg_map) && reg_map[args->param]) {
275 args->value = V3D_READ(reg_map[args->param]);
/xsrc/external/mit/MesaLib/dist/src/compiler/nir/
H A Dnir_schedule.c132 struct hash_table *reg_map; member in struct:__anon4f2975c40308
246 struct hash_entry *entry = _mesa_hash_table_search(state->reg_map,
273 struct hash_entry *entry = _mesa_hash_table_search(state->reg_map,
276 _mesa_hash_table_insert(state->reg_map, dest->reg.reg, dest_n);
315 ralloc(state->reg_map, struct nir_schedule_class_dep);
496 .reg_map = _mesa_pointer_hash_table_create(NULL),
505 ralloc_free(state.reg_map);
514 .reg_map = _mesa_pointer_hash_table_create(NULL),
523 ralloc_free(state.reg_map);

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