| /xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/x86emu/ |
| H A D | types.h | 56 #define s16 x86emus16 macro 72 typedef int16_t s16; typedef in typeref:typename:int16_t
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| H A D | fpu_regs.h | 54 s16 sval;
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| /xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/x86emu/ |
| H A D | types.h | 55 #define s16 x86emus16 macro 72 typedef int16_t s16; typedef in typeref:typename:int16_t
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| H A D | fpu_regs.h | 54 s16 sval;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/include/ |
| H A D | panfrost-misc.h | 36 typedef int16_t s16; typedef in typeref:typename:int16_t
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| /xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/ |
| H A D | ops2.c | 188 target = (s16) fetch_word_imm(); 189 target += (s16) M.x86.R_IP; 374 disp = (s16)*shiftreg >> 5; 386 disp = (s16)*shiftreg >> 4; 401 disp = (s16)*shiftreg >> 5; 413 disp = (s16)*shiftreg >> 4; 428 disp = (s16)*shiftreg >> 5; 440 disp = (s16)*shiftreg >> 4; 780 disp = (s16)*shiftreg >> 5; 794 disp = (s16)*shiftre [all...] |
| H A D | ops.c | 4377 s16 imm; 4386 res = (s16)srcval * (s16)imm; 4424 s16 imm; 4433 res = (s16)srcval * (s16)imm; 4471 s16 imm; 4480 res = (s16)srcval * (s16)imm; 4515 s16 im [all...] |
| H A D | prim_ops.c | 2051 s16 res = (s16)((s8)M.x86.R_AL * (s8)s); 2070 s32 res = (s16)M.x86.R_AX * (s16)s; 2221 dvd = (s16)M.x86.R_AX; 2249 div = dvd / (s16)s; 2250 mod = dvd % (s16)s;
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| /xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/ |
| H A D | ops2.c | 190 target = (s16) fetch_word_imm(); 191 target += (s16) M.x86.R_IP; 381 disp = (s16) * shiftreg >> 5; 394 disp = (s16) * shiftreg >> 4; 409 disp = (s16) * shiftreg >> 5; 422 disp = (s16) * shiftreg >> 4; 437 disp = (s16) * shiftreg >> 5; 450 disp = (s16) * shiftreg >> 4; 804 disp = (s16) * shiftreg >> 5; 819 disp = (s16) * shiftre [all...] |
| H A D | ops.c | 4634 s16 imm; 4643 res = (s16) srcval *(s16) imm; 4685 s16 imm; 4694 res = (s16) srcval *(s16) imm; 4736 s16 imm; 4745 res = (s16) srcval *(s16) imm; 4784 s16 im [all...] |
| H A D | prim_ops.c | 2159 s16 res = (s16) ((s8) M.x86.R_AL * (s8) s); 2180 s32 res = (s16) M.x86.R_AX * (s16) s; 2342 dvd = (s16) M.x86.R_AX; 2371 div = dvd / (s16) s; 2372 mod = dvd % (s16) s;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/lib/ |
| H A D | gk104.asm | 124 cvt rn f32 $r3 s16 1 $r1 125 cvt rn f32 $r2 s16 0 $r1 127 cvt rn f32 $r1 s16 1 $r0 130 cvt rn f32 $r0 s16 0 $r0 140 cvt s32 $r3 s16 1 $r1 141 cvt s32 $r2 s16 0 $r1 142 cvt s32 $r1 s16 1 $r0 143 cvt s32 $r0 s16 0 $r0 326 cvt rn f32 $r1 s16 1 $r0 329 cvt rn f32 $r0 s16 [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/lib/ |
| H A D | gk104.asm | 124 cvt rn f32 $r3 s16 1 $r1 125 cvt rn f32 $r2 s16 0 $r1 127 cvt rn f32 $r1 s16 1 $r0 130 cvt rn f32 $r0 s16 0 $r0 140 cvt s32 $r3 s16 1 $r1 141 cvt s32 $r2 s16 0 $r1 142 cvt s32 $r1 s16 1 $r0 143 cvt s32 $r0 s16 0 $r0 326 cvt rn f32 $r1 s16 1 $r0 329 cvt rn f32 $r0 s16 [all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | disasm-a3xx.c | 249 OPC(3, OPC_MAD_S16, mad.s16), 257 OPC(3, OPC_SEL_S16, sel.s16), 261 OPC(3, OPC_SAD_S16, sad.s16),
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| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| H A D | disasm-a3xx.c | 71 [TYPE_S16] = "s16", 937 OPC(3, OPC_MAD_S16, mad.s16), 945 OPC(3, OPC_SEL_S16, sel.s16), 949 OPC(3, OPC_SAD_S16, sad.s16),
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_ir.h | 316 s16 = 16, enumerator in enum:aco::RegClass::RC 346 constexpr RegType type() const { return rc <= RC::s16 ? RegType::sgpr : RegType::vgpr; } 352 constexpr bool is_linear() const { return rc <= RC::s16 || is_linear_vgpr(); } 384 static constexpr RegClass s16{RegClass::s16}; variable in namespace:aco
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| H A D | aco_instruction_selection.cpp | 11848 bld.smem(aco_opcode::s_load_dwordx16, Definition(dest, s16), base,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_print.cpp | 253 "u16", "s16", 493 case TYPE_S16: PRINT("%i", reg.data.s16); break;
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| H A D | nv50_ir.cpp | 390 return reg.data.s16 == i; 413 case TYPE_S16: return reg.data.s16 < 0;
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| H A D | nv50_ir.h | 538 int16_t s16; member in union:nv50_ir::Storage::__anonad2109e0010a
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| H A D | nv50_ir_peephole.cpp | 1577 CLAMP(imm0.reg.data.s16, imin, imax) : \ 1578 imm0.reg.data.s16; \ 1592 CASE(TYPE_S16, s16, INT16_MIN, INT16_MAX, INT16_MIN, INT16_MAX, 0, INT16_MAX); 1609 case TYPE_S16: res.data.f32 = (float) imm0.reg.data.s16; break; 1630 case TYPE_S16: res.data.f64 = (double) imm0.reg.data.s16; break;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir.cpp | 391 return reg.data.s16 == i; 414 case TYPE_S16: return reg.data.s16 < 0;
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| H A D | nv50_ir.h | 589 int16_t s16; member in union:nv50_ir::Storage::__anon1409d593010a
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| H A D | nv50_ir_print.cpp | 261 "u16", "s16", 526 case TYPE_S16: PRINT("%i", reg.data.s16); break;
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| H A D | nv50_ir_peephole.cpp | 1630 CLAMP(imm0.reg.data.s16, imin, imax) : \ 1631 imm0.reg.data.s16; \ 1645 CASE(TYPE_S16, s16, INT16_MIN, INT16_MAX, INT16_MIN, INT16_MAX, 0, INT16_MAX); 1662 case TYPE_S16: res.data.f32 = (float) imm0.reg.data.s16; break; 1683 case TYPE_S16: res.data.f64 = (double) imm0.reg.data.s16; break;
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