Searched refs:shader_info (Results 1 - 25 of 104) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_shader_args.c44 struct radv_userdata_info *ud_info = &args->shader_info->user_sgprs_locs.shader_data[idx];
61 struct radv_userdata_locations *locs = &args->shader_info->user_sgprs_locs;
82 if (args->shader_info->uses_view_index ||
83 (!args->shader_info->vs.as_es && !args->shader_info->vs.as_ls &&
88 if (args->shader_info->uses_view_index ||
89 (!args->shader_info->tes.as_es && args->options->key.has_multiview_view_index))
93 if (args->shader_info->uses_view_index)
97 if (args->shader_info->uses_view_index ||
98 (args->shader_info
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H A Dradv_shader_args.h33 struct radv_shader_info *shader_info; member in struct:radv_shader_args
H A Dradv_nir_to_llvm.c114 struct radv_userdata_locations *user_sgprs_locs = &ctx->args->shader_info->user_sgprs_locs;
115 uint32_t mask = ctx->args->shader_info->desc_set_used_mask;
171 if (is_pre_gs_stage(stage) && ctx->args->shader_info->is_ngg) {
192 (stage == MESA_SHADER_VERTEX && ctx->args->shader_info->vs.as_ls) ||
279 if (ctx->args->shader_info->ps.uses_sample_shading) {
309 if (ctx->args->shader_info->is_ngg) {
315 unsigned output_usage_mask = ctx->args->shader_info->gs.output_usage_mask[i];
316 uint8_t output_stream = ctx->args->shader_info->gs.output_streams[i];
354 if (ctx->args->shader_info->is_ngg) {
693 ctx->args->shader_info
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/xsrc/external/mit/MesaLib/dist/src/panfrost/lib/
H A Dpan_shader.h191 pan_shader_prepare_rsd(const struct pan_shader_info *shader_info, argument
196 shader_ptr |= shader_info->midgard.first_tag;
200 rsd->shader.attribute_count = shader_info->attribute_count;
201 rsd->shader.varying_count = shader_info->varyings.input_count +
202 shader_info->varyings.output_count;
203 rsd->shader.texture_count = shader_info->texture_count;
204 rsd->shader.sampler_count = shader_info->sampler_count;
205 rsd->properties.shader_contains_barrier = shader_info->contains_barrier;
206 rsd->properties.uniform_buffer_count = shader_info->ubo_count;
208 if (shader_info
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H A Dpan_indirect_dispatch.c222 struct pan_shader_info shader_info; local in function:GENX
226 GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader_info);
230 assert(!shader_info.tls_size);
231 assert(!shader_info.wls_size);
232 assert(!shader_info.sysvals.sysval_count);
241 dev->indirect_dispatch.push = shader_info.push;
251 address |= shader_info.midgard.first_tag;
256 pan_shader_prepare_rsd(&shader_info, address, &cfg);
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_nir_to_llvm.c52 struct radv_shader_variant_info *shader_info; member in struct:radv_shader_context
242 uint32_t num_tcs_outputs = util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
243 uint32_t num_tcs_patch_outputs = util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
298 num_tcs_outputs = util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
299 num_tcs_patch_outputs = util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
350 uint32_t num_tcs_outputs = util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
351 uint32_t num_tcs_patch_outputs = util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
362 uint32_t num_tcs_outputs = util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
390 uint32_t num_tcs_outputs = util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
562 &ctx->shader_info
3658 ac_translate_nir_to_llvm(struct ac_llvm_compiler * ac_llvm,struct nir_shader * const * shaders,int shader_count,struct radv_shader_variant_info * shader_info,const struct radv_nir_compiler_options * options) argument
3882 ac_compile_llvm_module(struct ac_llvm_compiler * ac_llvm,LLVMModuleRef llvm_module,struct ac_shader_binary * binary,struct ac_shader_config * config,struct radv_shader_variant_info * shader_info,gl_shader_stage stage,const struct radv_nir_compiler_options * options) argument
3972 ac_fill_shader_info(struct radv_shader_variant_info * shader_info,struct nir_shader * nir,const struct radv_nir_compiler_options * options) argument
4011 radv_compile_nir_shader(struct ac_llvm_compiler * ac_llvm,struct ac_shader_binary * binary,struct ac_shader_config * config,struct radv_shader_variant_info * shader_info,struct nir_shader * const * nir,int nir_count,const struct radv_nir_compiler_options * options) argument
4135 radv_compile_gs_copy_shader(struct ac_llvm_compiler * ac_llvm,struct nir_shader * geom_shader,struct ac_shader_binary * binary,struct ac_shader_config * config,struct radv_shader_variant_info * shader_info,const struct radv_nir_compiler_options * options) argument
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/xsrc/external/mit/mesa-demos/dist/src/rbug/
H A Dshdr_info.c33 static void shader_info(struct rbug_connection *con, rbug_context_t ctx) function in typeref:typename:void
87 shader_info(con, list->contexts[i]);
H A Dshdr_dump.c35 static void shader_info(struct rbug_connection *con, rbug_context_t ctx) function in typeref:typename:void
104 shader_info(con, list->contexts[i]);
/xsrc/external/mit/MesaLib.old/dist/src/compiler/
H A Dshader_info.h78 typedef struct shader_info { struct
279 } shader_info; typedef in typeref:struct:shader_info
/xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/
H A Dpanvk_vX_meta_clear.c39 struct pan_shader_info *shader_info)
70 GENX(pan_shader_compile)(b.shader, &inputs, &binary, shader_info);
73 assert(shader_info->ubo_mask == 0);
90 struct pan_shader_info *shader_info)
137 GENX(pan_shader_compile)(b.shader, &inputs, &binary, shader_info);
140 assert(shader_info->ubo_mask == 0);
157 struct pan_shader_info *shader_info,
167 pan_shader_prepare_rsd(shader_info, shader, &cfg);
202 cfg.properties.work_register_count = shader_info->work_reg_count;
247 shader_info
35 panvk_meta_clear_color_attachment_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,unsigned rt,enum glsl_base_type base_type,struct pan_shader_info * shader_info) argument
86 panvk_meta_clear_zs_attachment_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,bool clear_z,bool clear_s,enum glsl_base_type base_type,struct pan_shader_info * shader_info) argument
153 panvk_meta_clear_attachments_emit_rsd(struct panfrost_device * pdev,struct pan_pool * desc_pool,enum pipe_format format,unsigned rt,bool z,bool s,struct pan_shader_info * shader_info,mali_ptr shader) argument
424 struct pan_shader_info *shader_info; local in function:panvk_meta_clear_attachment
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H A Dpanvk_vX_meta_copy.c244 const struct pan_shader_info *shader_info,
259 pan_shader_prepare_rsd(shader_info, shader, &cfg);
287 cfg.properties.work_register_count = shader_info->work_reg_count;
372 const struct pan_shader_info *shader_info,
380 pan_shader_prepare_rsd(shader_info, shader, &cfg);
396 struct pan_shader_info *shader_info)
546 GENX(pan_shader_compile)(b.shader, &inputs, &binary, shader_info);
548 shader_info->fs.sample_shading = is_ms;
820 struct pan_shader_info shader_info; local in function:panvk_meta_copy_img2img_init
826 texdim, false, is_ms, &shader_info);
241 panvk_meta_copy_to_img_emit_rsd(struct panfrost_device * pdev,struct pan_pool * desc_pool,mali_ptr shader,const struct pan_shader_info * shader_info,enum pipe_format fmt,unsigned wrmask,bool from_img) argument
369 panvk_meta_copy_to_buf_emit_rsd(struct panfrost_device * pdev,struct pan_pool * desc_pool,mali_ptr shader,const struct pan_shader_info * shader_info,bool from_img) argument
391 panvk_meta_copy_img2img_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,enum pipe_format srcfmt,enum pipe_format dstfmt,unsigned dstmask,unsigned texdim,bool texisarray,bool is_ms,struct pan_shader_info * shader_info) argument
965 panvk_meta_copy_buf2img_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,struct panvk_meta_copy_format_info key,struct pan_shader_info * shader_info) argument
1263 struct pan_shader_info shader_info; local in function:panvk_meta_copy_buf2img_init
1365 panvk_meta_copy_img2buf_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,struct panvk_meta_copy_format_info key,unsigned texdim,unsigned texisarray,struct pan_shader_info * shader_info) argument
1710 struct pan_shader_info shader_info; local in function:panvk_meta_copy_img2buf_init
1773 panvk_meta_copy_buf2buf_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,unsigned blksz,struct pan_shader_info * shader_info) argument
1835 struct pan_shader_info shader_info; local in function:panvk_meta_copy_buf2buf_init
1930 panvk_meta_fill_buf_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,struct pan_shader_info * shader_info) argument
1987 struct pan_shader_info shader_info; local in function:panvk_meta_fill_buf_emit_rsd
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H A Dpanvk_vX_cs.h115 const struct pan_shader_info *shader_info,
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/ir3/
H A Dir3_gallium.h53 struct shader_info *ir3_get_shader_info(struct ir3_shader_state *hwcso);
/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A Daco_instruction_selection_setup.cpp276 assert(!ctx->args->shader_info->so.num_outputs);
304 ctx->tcs_in_out_eq = ctx->args->shader_info->vs.tcs_in_out_eq;
305 ctx->tcs_temp_only_inputs = ctx->args->shader_info->vs.tcs_temp_only_input_mask;
306 ctx->tcs_num_patches = ctx->args->shader_info->num_tess_patches;
307 ctx->program->config->lds_size = ctx->args->shader_info->tcs.num_lds_blocks;
313 ctx->tcs_num_patches = ctx->args->shader_info->num_tess_patches;
320 assert(!ctx->args->shader_info->so.num_outputs);
391 if (ctx->shader->info.stage == MESA_SHADER_COMPUTE && ctx->args->shader_info->cs.subgroup_size) {
392 ctx->ub_config.min_subgroup_size = ctx->args->shader_info->cs.subgroup_size;
393 ctx->ub_config.max_subgroup_size = ctx->args->shader_info
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_screen.h48 struct shader_info;
121 const struct shader_info *info,
127 const struct shader_info *info,
131 const struct shader_info *info,
135 const struct shader_info *info,
/xsrc/external/mit/MesaLib/src/gallium/drivers/lima/
H A Dlima_nir_algebraic.c137 const shader_info *info = &shader->info;
269 const shader_info *info = &shader->info;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_screen.h120 const struct shader_info *info,
126 const struct shader_info *info,
130 const struct shader_info *info,
134 const struct shader_info *info,
H A Diris_resource.h35 struct shader_info;
487 const struct shader_info *info);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/
H A Dsfn_debug.h48 shader_info = 1 << 4, enumerator in enum:r600::SfnLog::LogFlag
H A Dsfn_debug.cpp64 {"si", SfnLog::shader_info, "Log shader info (non-zero values)"},
/xsrc/external/mit/MesaLib/dist/src/freedreno/decode/
H A Dpgmdump2.c31 * - per shader stage section (shader_info) starts with a header,
34 * of shader_info section where the data is found
65 /* current shader_info section, some offsets calculated relative to
142 struct shader_info;
143 static void decode_shader_info(struct state *state, struct shader_info *info);
189 uint32_t fs_info; /* offset of FS shader_info section */
191 uint32_t vs_info; /* offset of VS shader_info section */
193 uint32_t vs_info2; /* offset of VS shader_info section (again?) */
195 uint32_t bs_info; /* offset of binning shader_info section */
209 O(hdr, fs_info, shader_info);
416 struct PACKED shader_info { struct
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/xsrc/external/mit/MesaLib/dist/src/compiler/
H A Dshader_info.h119 typedef struct shader_info { struct
485 } shader_info; typedef in typeref:struct:shader_info
/xsrc/external/mit/MesaLib/src/intel/compiler/
H A Dbrw_nir_trig_workarounds.c151 const shader_info *info = &shader->info;
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_link.cpp167 unify_interfaces(struct shader_info **infos)
169 struct shader_info *prev_info = NULL;
190 struct shader_info *info)
230 struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_link.cpp167 unify_interfaces(struct shader_info **infos)
169 struct shader_info *prev_info = NULL;
190 struct shader_info *info)
230 struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };

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