Searched refs:simd_width (Results 1 - 7 of 7) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_compiler.h790 unsigned simd_width)
792 switch (simd_width) {
806 unsigned simd_width)
808 switch (simd_width) {
822 unsigned simd_width)
824 switch (simd_width) {
789 _brw_wm_prog_data_prog_offset(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
805 _brw_wm_prog_data_dispatch_grf_start_reg(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
821 _brw_wm_prog_data_reg_blocks(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_nir_lower_cs_intrinsics.c229 nir_ssa_def *simd_width = nir_load_simd_width_intel(b); local in function:lower_cs_intrinsics_convert_block
231 nir_udiv(b, nir_iadd_imm(b, nir_iadd(b, size, simd_width), -1),
232 simd_width);
H A Dbrw_compiler.h977 unsigned simd_width)
979 switch (simd_width) {
993 unsigned simd_width)
995 switch (simd_width) {
1009 unsigned simd_width)
1011 switch (simd_width) {
976 _brw_wm_prog_data_prog_offset(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
992 _brw_wm_prog_data_dispatch_grf_start_reg(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
1008 _brw_wm_prog_data_reg_blocks(const struct brw_wm_prog_data * prog_data,unsigned simd_width) argument
H A Dbrw_fs.cpp10044 uintptr_t simd_width = (uintptr_t)options; local in function:lower_simd
10048 return nir_imm_int(b, simd_width);
10058 if (local_workgroup_size <= simd_width)
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dvir.c765 prog_data->simd_width = 16;
766 while ((prog_data->simd_width > 1 && prog_data->vpm_output_size > 16) ||
767 prog_data->simd_width == 2) {
768 prog_data->simd_width >>= 1;
773 assert(prog_data->simd_width != 2);
2030 vpm_cfg[phase].gs_width = gs->simd_width;
H A Dv3d_compiler.h935 uint8_t simd_width; member in struct:v3d_gs_prog_data
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_pipeline.c3146 unsigned simd_width = exe->stats.dispatch_width; local in function:anv_GetPipelineExecutablePropertiesKHR
3149 simd_width ? "SIMD" : "vec",
3150 simd_width ? simd_width : 4,
3156 simd_width ? "SIMD" : "vec",
3157 simd_width ? simd_width : 4,
3163 props->subgroupSize = MAX2(simd_width, 1);

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