Searched refs:single_buffer (Results 1 - 13 of 13) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_internal.h | 83 unsigned single_buffer : 1; member in struct:etna_specs
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| H A D | etnaviv_screen.c | 615 if ((screen->specs.pixel_pipes == 1 || screen->specs.single_buffer) &&
910 screen->specs.single_buffer = VIV_FEATURE(screen, chipMinorFeatures4, SINGLE_BUFFER);
911 if (screen->specs.single_buffer)
1103 screen->specs.single_buffer = 0;
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| H A D | etnaviv_surface.c | 48 bool need_multitiled = screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer;
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| H A D | etnaviv_resource.c | 347 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
395 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
401 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
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| H A D | etnaviv_rs.c | 137 if (!screen->specs.single_buffer && screen->specs.pixel_pipes == 2 && !(rs->height & 7)) {
156 if (screen->specs.single_buffer && rs->source == rs->dest &&
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| H A D | etnaviv_state.c | 184 assert((res->layout & ETNA_LAYOUT_BIT_MULTI) || screen->specs.single_buffer);
359 pe_logic_op |= VIVS_PE_LOGIC_OP_SINGLE_BUFFER(screen->specs.single_buffer ? 3 : 0);
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| H A D | etnaviv_context.c | 450 etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_resource.c | 345 if (!screen->specs.single_buffer)
402 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
408 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
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| H A D | etnaviv_internal.h | 80 unsigned single_buffer : 1; member in struct:etna_specs
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| H A D | etnaviv_screen.c | 648 if ((screen->specs.pixel_pipes == 1 || screen->specs.single_buffer) &&
854 screen->specs.single_buffer = VIV_FEATURE(screen, chipMinorFeatures4, SINGLE_BUFFER);
855 if (screen->specs.single_buffer)
1000 screen->specs.single_buffer = 0;
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| H A D | etnaviv_state.c | 160 assert((res->layout & ETNA_LAYOUT_BIT_MULTI) || ctx->specs.single_buffer);
324 cs->PE_LOGIC_OP = VIVS_PE_LOGIC_OP_SINGLE_BUFFER(ctx->specs.single_buffer ? 3 : 0);
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| H A D | etnaviv_context.c | 382 etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
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| H A D | etnaviv_rs.c | 108 if (ctx->specs.pixel_pipes == 1 || ctx->specs.single_buffer) {
140 if (ctx->specs.single_buffer && rs->source == rs->dest &&
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