Searched refs:sq_gpr_resource_mgmt_2 (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Devergreen_accel.c137 uint32_t sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2, sq_gpr_resource_mgmt_3; local in function:evergreen_sq_setup
163 sq_gpr_resource_mgmt_2 = ((sq_conf->num_gs_gprs << NUM_GS_GPRS_shift) |
190 E32(sq_gpr_resource_mgmt_2);
H A Dr6xx_accel.c174 uint32_t sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local in function:r600_sq_setup
197 sq_gpr_resource_mgmt_2 = ((sq_conf->num_gs_gprs << NUM_GS_GPRS_shift) |
215 E32(ib, sq_gpr_resource_mgmt_2);
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Devergreen_accel.c134 uint32_t sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2, sq_gpr_resource_mgmt_3; local in function:evergreen_sq_setup
160 sq_gpr_resource_mgmt_2 = ((sq_conf->num_gs_gprs << NUM_GS_GPRS_shift) |
187 E32(sq_gpr_resource_mgmt_2);
H A Dr6xx_accel.c129 uint32_t sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local in function:r600_sq_setup
152 sq_gpr_resource_mgmt_2 = ((sq_conf->num_gs_gprs << NUM_GS_GPRS_shift) |
170 E32(sq_gpr_resource_mgmt_2);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600_state.c1660 radeon_set_config_reg(cs, R_008C08_SQ_GPR_RESOURCE_MGMT_2, a->sq_gpr_resource_mgmt_2);
2019 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
2020 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
2080 if (rctx->config_state.sq_gpr_resource_mgmt_1 != tmp || rctx->config_state.sq_gpr_resource_mgmt_2 != tmp2) {
2082 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp2;
H A Dr600_pipe.h229 unsigned sq_gpr_resource_mgmt_2; member in struct:r600_config_state
H A Devergreen_state.c987 radeon_emit(cs, a->sq_gpr_resource_mgmt_2);
4668 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
4669 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
4726 rctx->config_state.sq_gpr_resource_mgmt_2 != tmp[1] ||
4729 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp[1];
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_state.c1663 radeon_set_config_reg(cs, R_008C08_SQ_GPR_RESOURCE_MGMT_2, a->sq_gpr_resource_mgmt_2);
2022 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
2023 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
2083 if (rctx->config_state.sq_gpr_resource_mgmt_1 != tmp || rctx->config_state.sq_gpr_resource_mgmt_2 != tmp2) {
2085 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp2;
H A Dr600_pipe.h229 unsigned sq_gpr_resource_mgmt_2; member in struct:r600_config_state
H A Devergreen_state.c993 radeon_emit(cs, a->sq_gpr_resource_mgmt_2);
4700 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
4701 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2);
4758 rctx->config_state.sq_gpr_resource_mgmt_2 != tmp[1] ||
4761 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp[1];

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