Searched refs:src_reg (Results 1 - 25 of 100) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_surface_builder.h32 src_reg
34 const src_reg &surface, const src_reg &addr,
39 emit_untyped_write(const vec4_builder &bld, const src_reg &surface,
40 const src_reg &addr, const src_reg &src,
44 src_reg
46 const src_reg &surface, const src_reg &addr,
47 const src_reg
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H A Dbrw_vec4.h124 src_reg shader_start_time;
175 const src_reg &src0);
177 const src_reg &src0, const src_reg &src1);
179 const src_reg &src0, const src_reg &src1,
180 const src_reg &src2);
186 #define EMIT1(op) vec4_instruction *op(const dst_reg &, const src_reg &);
187 #define EMIT2(op) vec4_instruction *op(const dst_reg &, const src_reg &, const src_reg
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H A Dgen6_gs_visitor.h73 src_reg vertex_output;
74 src_reg vertex_output_offset;
75 src_reg temp;
76 src_reg first_vertex;
77 src_reg prim_count;
78 src_reg primitive_id;
81 src_reg sol_prim_written;
82 src_reg svbi;
83 src_reg max_svbi;
84 src_reg destination_indice
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H A Dbrw_vec4_tcs.h59 const src_reg &vertex_index,
62 const src_reg &indirect_offset);
66 const src_reg &indirect_offset);
68 void emit_urb_write(const src_reg &value, unsigned writemask,
69 unsigned base_offset, const src_reg &indirect_offset);
80 src_reg invocation_id;
H A Dbrw_vec4_surface_builder.cpp34 static src_reg
35 emit_stride(const vec4_builder &bld, const src_reg &src, unsigned size,
50 return src_reg(dst);
60 static src_reg
61 emit_insert(const vec4_builder &bld, const src_reg &src,
65 return src_reg();
76 return emit_stride(bld, src_reg(tmp), n, has_simd4x2 ? 1 : 4, 1);
91 src_reg
93 const src_reg &header,
94 const src_reg
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H A Dtest_vec4_cmod_propagation.cpp147 src_reg src0 = src_reg(v, glsl_type::float_type);
148 src_reg src1 = src_reg(v, glsl_type::float_type);
149 src_reg zero(brw_imm_f(0.0f));
154 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE);
183 src_reg src0 = src_reg(v, glsl_type::float_type);
184 src_reg src1 = src_reg(
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H A Dtest_vec4_dead_code_eliminate.cpp125 src_reg r1 = src_reg(v, glsl_type::vec4_type);
126 src_reg r2 = src_reg(v, glsl_type::vec4_type);
127 src_reg r3 = src_reg(v, glsl_type::vec4_type);
128 src_reg r4 = src_reg(v, glsl_type::vec4_type);
129 src_reg r5 = src_reg(
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H A Dtest_vec4_register_coalesce.cpp129 src_reg something = src_reg(v, glsl_type::float_type);
138 v->emit(v->MOV(m0, src_reg(temp)));
148 src_reg something = src_reg(v, glsl_type::float_type);
160 src_reg src = src_reg(temp);
174 src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
175 src_reg some_src_
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H A Dbrw_vec4_builder.h43 typedef brw::src_reg src_reg; typedef in class:brw::vec4_builder
245 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const
268 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
269 const src_reg &src1) const
289 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
290 const src_reg &src1, const src_reg &src2) const
335 emit_minmax(const dst_reg &dst, const src_reg &src0,
336 const src_reg
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H A Dbrw_vec4_visitor.cpp32 const src_reg &src0, const src_reg &src1,
33 const src_reg &src2)
89 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
90 const src_reg &src1, const src_reg &src2)
97 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
98 const src_reg &src1)
104 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0)
123 vec4_visitor::op(const dst_reg &dst, const src_reg
684 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type) function in class:brw::src_reg
700 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type, int size) function in class:brw::src_reg
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H A Dbrw_fs_builder.h43 typedef fs_reg src_reg; typedef in class:brw::fs_builder
249 src_reg
294 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const
316 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
317 const src_reg &src1) const
338 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
339 const src_reg &src1, const src_reg &src2) const
362 emit(enum opcode opcode, const dst_reg &dst, const src_reg srcs[],
398 emit_minmax(const dst_reg &dst, const src_reg
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H A Dbrw_vec4_tes.cpp106 input_read_header = src_reg(this, glsl_type::uvec4_type);
149 src_reg(brw_vec8_grf(1, 0))));
154 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type),
158 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type),
165 swizzle(src_reg(ATTR, 0, glsl_type::vec4_type),
169 src_reg(ATTR, 1, glsl_type::float_type)));
179 src_reg indirect_offset = get_indirect_offset(instr);
181 src_reg header = input_read_header;
188 src_reg clamped_indirect_offset = src_reg(thi
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H A Dbrw_ir_vec4.h34 class src_reg : public backend_reg class in namespace:brw
37 DECLARE_RALLOC_CXX_OPERATORS(src_reg)
41 src_reg(enum brw_reg_file file, int nr, const glsl_type *type);
42 src_reg();
43 src_reg(struct ::brw_reg reg);
45 bool equals(const src_reg &r) const;
46 bool negative_equals(const src_reg &r) const;
48 src_reg(class vec4_visitor *v, const struct glsl_type *type);
49 src_reg(class vec4_visitor *v, const struct glsl_type *type, int size);
51 explicit src_reg(cons
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/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_surface_builder.h32 src_reg
34 const src_reg &surface, const src_reg &addr,
39 emit_untyped_write(const vec4_builder &bld, const src_reg &surface,
40 const src_reg &addr, const src_reg &src,
44 src_reg
46 const src_reg &surface, const src_reg &addr,
47 const src_reg
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H A Dgfx6_gs_visitor.h69 src_reg vertex_output;
70 src_reg vertex_output_offset;
71 src_reg temp;
72 src_reg first_vertex;
73 src_reg prim_count;
74 src_reg primitive_id;
77 src_reg sol_prim_written;
78 src_reg svbi;
79 src_reg max_svbi;
80 src_reg destination_indice
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H A Dbrw_vec4.h127 src_reg shader_start_time;
175 const src_reg &src0);
177 const src_reg &src0, const src_reg &src1);
179 const src_reg &src0, const src_reg &src1,
180 const src_reg &src2);
186 #define EMIT1(op) vec4_instruction *op(const dst_reg &, const src_reg &);
187 #define EMIT2(op) vec4_instruction *op(const dst_reg &, const src_reg &, const src_reg
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H A Dbrw_vec4_tcs.h59 const src_reg &vertex_index,
62 const src_reg &indirect_offset);
66 const src_reg &indirect_offset);
68 void emit_urb_write(const src_reg &value, unsigned writemask,
69 unsigned base_offset, const src_reg &indirect_offset);
78 src_reg invocation_id;
H A Dbrw_vec4_surface_builder.cpp34 static src_reg
35 emit_stride(const vec4_builder &bld, const src_reg &src, unsigned size,
50 return src_reg(dst);
60 static src_reg
61 emit_insert(const vec4_builder &bld, const src_reg &src,
65 return src_reg();
76 return emit_stride(bld, src_reg(tmp), n, has_simd4x2 ? 1 : 4, 1);
91 src_reg
93 const src_reg &header,
94 const src_reg
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H A Dtest_vec4_cmod_propagation.cpp159 src_reg src0 = src_reg(v, glsl_type::float_type);
160 src_reg src1 = src_reg(v, glsl_type::float_type);
161 src_reg zero(brw_imm_f(0.0f));
166 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE);
195 src_reg src0 = src_reg(v, glsl_type::float_type);
196 src_reg src1 = src_reg(
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H A Dtest_vec4_dead_code_eliminate.cpp137 src_reg r1 = src_reg(v, glsl_type::vec4_type);
138 src_reg r2 = src_reg(v, glsl_type::vec4_type);
139 src_reg r3 = src_reg(v, glsl_type::vec4_type);
140 src_reg r4 = src_reg(v, glsl_type::vec4_type);
141 src_reg r5 = src_reg(
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H A Dtest_vec4_register_coalesce.cpp140 src_reg something = src_reg(v, glsl_type::float_type);
149 v->emit(v->MOV(m0, src_reg(temp)));
159 src_reg something = src_reg(v, glsl_type::float_type);
171 src_reg src = src_reg(temp);
185 src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
186 src_reg some_src_
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H A Dbrw_vec4_builder.h43 typedef brw::src_reg src_reg; typedef in class:brw::vec4_builder
245 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const
268 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
269 const src_reg &src1) const
289 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
290 const src_reg &src1, const src_reg &src2) const
335 emit_minmax(const dst_reg &dst, const src_reg &src0,
336 const src_reg
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H A Dbrw_vec4_visitor.cpp32 const src_reg &src0, const src_reg &src1,
33 const src_reg &src2)
89 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
90 const src_reg &src1, const src_reg &src2)
97 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0,
98 const src_reg &src1)
104 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0)
123 vec4_visitor::op(const dst_reg &dst, const src_reg
671 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type) function in class:brw::src_reg
687 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type, int size) function in class:brw::src_reg
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_inline_literals.c111 struct rc_src_register * src_reg = local in function:rc_inline_literals
114 if (src_reg->File != RC_FILE_CONSTANT) {
118 &c->Program.Constants.Constants[src_reg->Index];
125 swz = GET_SWZ(src_reg->Swizzle, chan);
138 if (ret == -1 && src_reg->Abs) {
159 src_reg->File = RC_FILE_INLINE;
160 src_reg->Index = r300_float;
161 src_reg->Swizzle = new_swizzle;
162 src_reg->Negate = src_reg
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_inline_literals.c111 struct rc_src_register * src_reg = local in function:rc_inline_literals
114 if (src_reg->File != RC_FILE_CONSTANT) {
118 &c->Program.Constants.Constants[src_reg->Index];
125 swz = GET_SWZ(src_reg->Swizzle, chan);
138 if (ret == -1 && src_reg->Abs) {
159 src_reg->File = RC_FILE_INLINE;
160 src_reg->Index = r300_float;
161 src_reg->Swizzle = new_swizzle;
162 src_reg->Negate = src_reg
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