Searched refs:subOp (Results 1 - 25 of 39) sorted by relevance

12

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_print.cpp625 if (subOp < ARRAY_SIZE(atomSubOpStr))
626 PRINT("%s ", atomSubOpStr[subOp]);
630 if (subOp < ARRAY_SIZE(ldstSubOpStr))
631 PRINT("%s ", ldstSubOpStr[subOp]);
634 if (subOp < ARRAY_SIZE(subfmOpStr))
635 PRINT("%s ", subfmOpStr[subOp]);
638 if (subOp < ARRAY_SIZE(shflOpStr))
639 PRINT("%s ", shflOpStr[subOp]);
642 if (subOp < ARRAY_SIZE(pixldOpStr))
643 PRINT("%s ", pixldOpStr[subOp]);
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H A Dnv50_ir_emit_gk110.cpp105 void emitLogicOp(const Instruction *, uint8_t subOp);
114 void emitSFnOp(const Instruction *, uint8_t subOp);
560 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
563 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
564 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
565 code[1] |= (i->subOp & 0x100) << 11; // imadp3
566 code[1] |= (i->subOp & 0x200) << 15; // imadp3
567 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
643 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
650 if (i->subOp
856 emitLogicOp(const Instruction * i,uint8_t subOp) argument
992 emitSFnOp(const Instruction * i,uint8_t subOp) argument
1817 emitSUCLAMPMode(uint16_t subOp) argument
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H A Dnv50_ir_emit_nvc0.cpp111 void emitLogicOp(const Instruction *, uint8_t subOp);
119 void emitSFnOp(const Instruction *, uint8_t subOp);
653 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
780 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
830 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
833 code[0] |= (i->subOp & 0x00f) << 7;
834 code[0] |= (i->subOp & 0x0f0) << 1;
835 code[0] |= (i->subOp & 0x100) >> 3;
836 code[0] |= (i->subOp & 0x200) >> 2;
837 code[1] |= (i->subOp
867 emitLogicOp(const Instruction * i,uint8_t subOp) argument
998 emitSFnOp(const Instruction * i,uint8_t subOp) argument
2227 emitSUCLAMPMode(uint16_t subOp) argument
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H A Dnv50_ir_emit_gm107.cpp799 emitField(0x29, 1, insn->subOp);
882 emitField(0x29, 2, insn->subOp);
915 emitField(0x29, 2, insn->subOp);
959 if (insn->subOp == 1) {
1004 emitField(0x1e, 2, insn->subOp);
1412 case OP_RCP: mufu = 4 + 2 * insn->subOp; break;
1413 case OP_RSQ: mufu = 5 + 2 * insn->subOp; break;
1644 emitField(0x1c, 8, insn->subOp);
1807 emitField(0x27, 1, insn->subOp == NV50_IR_SUBOP_MUL_HIGH);
1812 emitField(0x35, 1, insn->subOp
2579 unsigned dType, subOp; local in function:nv50_ir::CodeEmitterGM107::emitATOM
2619 unsigned dType, subOp; local in function:nv50_ir::CodeEmitterGM107::emitATOMS
3291 uint8_t type = 0, subOp; local in function:nv50_ir::CodeEmitterGM107::emitSUREDx
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H A Dnv50_ir_lowering_nvc0.cpp146 i->subOp = NV50_IR_SUBOP_RCPRSQ_64H;
276 hi->subOp |= NV50_IR_SUBOP_SHIFT_HIGH;
574 if (prev->subOp > useVec[i].level)
575 prev->subOp = useVec[i].level;
580 bar->subOp = useVec[i].level;
611 min = MIN2(min, i->subOp);
612 max = MIN2(max, i->subOp);
655 if (i->subOp >= max) {
659 max = i->subOp;
660 if (prev && prev->op == OP_TEXBAR && prev->subOp >
2064 uint16_t subOp = 0; local in function:nv50_ir::NVC0LoweringPass::processSurfaceCoordsNVE4
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H A Dnv50_ir_emit_nv50.cpp111 void emitSFnOp(const Instruction *, uint8_t subOp);
1320 if (i->subOp == 1) {
1487 CodeEmitterNV50::emitSFnOp(const Instruction *i, uint8_t subOp) argument
1498 code[1] = subOp << 29;
1502 assert(subOp == 6 && i->op == OP_EX2);
1712 switch (i->subOp) {
1719 assert(i->subOp == (NV50_IR_SUBOP_EMU_PRERET + 2));
1756 if (i->subOp >= NV50_IR_SUBOP_EMU_PRERET) {
1802 if (i->subOp == NV50_IR_SUBOP_BAR_SYNC)
1809 uint8_t subOp; local in function:nv50_ir::CodeEmitterNV50::emitATOM
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H A Dnv50_ir_lowering_gm107.cpp141 add->subOp = qOps[0];
149 add->subOp = qOps[1];
226 shfl->subOp = NV50_IR_SUBOP_SHFL_BFLY;
228 insn->subOp = qop;
H A Dnv50_ir_peephole.cpp200 (insn->subOp & NV50_IR_SUBOP_XMAD_CMODE_MASK) == NV50_IR_SUBOP_XMAD_CBCC)
202 if (insn->op == OP_XMAD && (insn->subOp & NV50_IR_SUBOP_XMAD_MRG))
209 if (insn->op == OP_SET && insn->subOp)
250 uint16_t h1 = (insn->subOp >> 1 & NV50_IR_SUBOP_XMAD_H1(0)) |
251 (insn->subOp << 1 & NV50_IR_SUBOP_XMAD_H1(1));
252 insn->subOp = (insn->subOp & ~NV50_IR_SUBOP_XMAD_H1_MASK) | h1;
576 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
582 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
689 if (i->subOp
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H A Dnv50_ir_lowering_helper.cpp134 hi->subOp = NV50_IR_SUBOP_MINMAX_HIGH;
138 lo->subOp = NV50_IR_SUBOP_MINMAX_LOW;
H A Dnv50_ir_from_tgsi.cpp1724 void handleATOM(Value *dst0[4], DataType, uint16_t subOp);
2916 Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) argument
2942 if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2950 insn->subOp = subOp;
2961 if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2970 tex->subOp = subOp;
2994 insn->subOp = subOp;
[all...]
H A Dnv50_ir_from_nir.cpp2088 mkOp1(OP_PIXLD, TYPE_U32, newDefs[0], getSrc(&insn->src[0], 0))->subOp = NV50_IR_SUBOP_PIXLD_OFFSET;
2174 mkOp1(OP_VOTE, TYPE_U32, pred, pred)->subOp = getSubOp(op);
2182 mkOp1(OP_VOTE, TYPE_U32, newDefs[0], pred)->subOp = NV50_IR_SUBOP_VOTE_ANY;
2192 mkOp1(OP_VOTE, TYPE_U32, tmp, mkImm(1))->subOp = NV50_IR_SUBOP_VOTE_ANY;
2193 mkOp2(OP_EXTBF, TYPE_U32, tmp, tmp, mkImm(0x2000))->subOp = NV50_IR_SUBOP_EXTBF_REV;
2194 mkOp1(OP_BFIND, TYPE_U32, tmp, tmp)->subOp = NV50_IR_SUBOP_BFIND_SAMT;
2200 ->subOp = NV50_IR_SUBOP_SHFL_IDX;
2329 atom->subOp = getSubOp(op);
2356 atom->subOp = getSubOp(op);
2452 texi->subOp
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H A Dnv50_ir_lowering_nv50.cpp46 const bool highResult = mul->subOp == NV50_IR_SUBOP_MUL_HIGH;
278 pre->subOp = NV50_IR_SUBOP_EMU_PRERET + 0;
290 skip->subOp = NV50_IR_SUBOP_EMU_PRERET + 1;
291 call->subOp = NV50_IR_SUBOP_EMU_PRERET + 2;
473 mul->subOp = add->subOp;
474 add->subOp = 0;
1277 i->subOp = NV50_IR_SUBOP_MOV_FINAL;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_emit_gv100.cpp226 emitField(60, 2, insn->subOp); // ./.H1/.INVALID2/.INVALID3
291 emitField(60, 2, insn->subOp >> 1);
293 emitField(60, 2, insn->subOp); // ./.B1/.B2/.B3
373 emitField(72, 3, insn->subOp);
409 if (insn->subOp >= 1)
410 addInterp(insn->subOp - 1, 0, gv100_selpFlip);
459 emitField(58, 2, insn->subOp);
569 uint8_t subOp = 0; local in function:nv50_ir::CodeEmitterGV100::emitFSWZADD
573 uint8_t p = ((insn->subOp >> (i * 2)) & 3);
576 subOp |
865 unsigned subOp, dType; local in function:nv50_ir::CodeEmitterGV100::emitATOM
916 unsigned dType, subOp; local in function:nv50_ir::CodeEmitterGV100::emitATOMS
1441 uint8_t type = 0, subOp; local in function:nv50_ir::CodeEmitterGV100::emitSUATOM
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H A Dnv50_ir_lowering_gv100.cpp110 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
123 uint8_t subOp; local in function:nv50_ir::GV100LegalizeSSA::handleLOP2
131 case OP_AND: subOp = src0 & src1; break;
132 case OP_OR : subOp = src0 | src1; break;
133 case OP_XOR: subOp = src0 ^ src1; break;
139 bld.mkImm(0))->subOp = subOp;
147 bld.mkImm(0))->subOp = (uint8_t)~NV50_IR_SUBOP_LOP3_LUT_SRC1;
218 uint8_t subOp = i->op == OP_SHL ? NV50_IR_SUBOP_SHF_L : NV50_IR_SUBOP_SHF_R; local in function:nv50_ir::GV100LegalizeSSA::handleShift
226 subOp |
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H A Dnv50_ir_emit_gk110.cpp103 void emitLogicOp(const Instruction *, uint8_t subOp);
112 void emitSFnOp(const Instruction *, uint8_t subOp);
558 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
561 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
562 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
563 code[1] |= (i->subOp & 0x100) << 11; // imadp3
564 code[1] |= (i->subOp & 0x200) << 15; // imadp3
565 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
641 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
648 if (i->subOp
854 emitLogicOp(const Instruction * i,uint8_t subOp) argument
990 emitSFnOp(const Instruction * i,uint8_t subOp) argument
1824 emitSUCLAMPMode(uint16_t subOp) argument
[all...]
H A Dnv50_ir_print.cpp665 if (subOp < ARRAY_SIZE(atomSubOpStr))
666 PRINT("%s ", atomSubOpStr[subOp]);
670 if (subOp < ARRAY_SIZE(ldstSubOpStr))
671 PRINT("%s ", ldstSubOpStr[subOp]);
674 if (subOp < ARRAY_SIZE(subfmOpStr))
675 PRINT("%s ", subfmOpStr[subOp]);
678 if (subOp < ARRAY_SIZE(shflOpStr))
679 PRINT("%s ", shflOpStr[subOp]);
682 if (subOp < ARRAY_SIZE(pixldOpStr))
683 PRINT("%s ", pixldOpStr[subOp]);
[all...]
H A Dnv50_ir_emit_nvc0.cpp109 void emitLogicOp(const Instruction *, uint8_t subOp);
117 void emitSFnOp(const Instruction *, uint8_t subOp);
651 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
778 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
828 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
831 code[0] |= (i->subOp & 0x00f) << 7;
832 code[0] |= (i->subOp & 0x0f0) << 1;
833 code[0] |= (i->subOp & 0x100) >> 3;
834 code[0] |= (i->subOp & 0x200) >> 2;
835 code[1] |= (i->subOp
865 emitLogicOp(const Instruction * i,uint8_t subOp) argument
996 emitSFnOp(const Instruction * i,uint8_t subOp) argument
2234 emitSUCLAMPMode(uint16_t subOp) argument
[all...]
H A Dnv50_ir_emit_gm107.cpp828 emitField(0x29, 1, insn->subOp);
911 emitField(0x29, 2, insn->subOp);
944 emitField(0x29, 2, insn->subOp);
997 if (insn->subOp >= 1) {
998 addInterp(insn->subOp - 1, 0, gm107_selpFlip);
1042 emitField(0x1e, 2, insn->subOp);
1450 case OP_RCP: mufu = 4 + 2 * insn->subOp; break;
1451 case OP_RSQ: mufu = 5 + 2 * insn->subOp; break;
1682 emitField(0x1c, 8, insn->subOp);
1845 emitField(0x27, 1, insn->subOp
2644 unsigned dType, subOp; local in function:nv50_ir::CodeEmitterGM107::emitATOM
2684 unsigned dType, subOp; local in function:nv50_ir::CodeEmitterGM107::emitATOMS
3356 uint8_t type = 0, subOp; local in function:nv50_ir::CodeEmitterGM107::emitSUREDx
[all...]
H A Dnv50_ir_emit_nv50.cpp109 void emitSFnOp(const Instruction *, uint8_t subOp);
646 if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
718 if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
1328 if (i->subOp == 1) {
1561 CodeEmitterNV50::emitSFnOp(const Instruction *i, uint8_t subOp) argument
1572 code[1] = subOp << 29;
1576 assert(subOp == 6 && i->op == OP_EX2);
1790 switch (i->subOp) {
1797 assert(i->subOp == (NV50_IR_SUBOP_EMU_PRERET + 2));
1834 if (i->subOp >
1887 uint8_t subOp; local in function:nv50_ir::CodeEmitterNV50::emitATOM
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H A Dnv50_ir_lowering_nvc0.cpp146 i->subOp = NV50_IR_SUBOP_RCPRSQ_64H;
276 hi->subOp |= NV50_IR_SUBOP_SHIFT_HIGH;
317 i->subOp = NV50_IR_SUBOP_EXTBF_REV;
585 if (prev->subOp > useVec[i].level)
586 prev->subOp = useVec[i].level;
591 bar->subOp = useVec[i].level;
622 min = MIN2(min, i->subOp);
623 max = MIN2(max, i->subOp);
666 if (i->subOp >= max) {
670 max = i->subOp;
2085 uint16_t subOp = 0; local in function:nv50_ir::NVC0LoweringPass::processSurfaceCoordsNVE4
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H A Dnv50_ir_peephole.cpp200 (insn->subOp & NV50_IR_SUBOP_XMAD_CMODE_MASK) == NV50_IR_SUBOP_XMAD_CBCC)
202 if (insn->op == OP_XMAD && (insn->subOp & NV50_IR_SUBOP_XMAD_MRG))
209 if (insn->op == OP_SET && insn->subOp)
250 uint16_t h1 = (insn->subOp >> 1 & NV50_IR_SUBOP_XMAD_H1(0)) |
251 (insn->subOp << 1 & NV50_IR_SUBOP_XMAD_H1(1));
252 insn->subOp = (insn->subOp & ~NV50_IR_SUBOP_XMAD_H1_MASK) | h1;
279 if (ld->op == OP_LOAD && ld->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
592 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
598 if (i->subOp
[all...]
H A Dnv50_ir_lowering_gm107.cpp160 add->subOp = qOps[0];
168 add->subOp = qOps[1];
245 shfl->subOp = NV50_IR_SUBOP_SHFL_BFLY;
247 insn->subOp = qop;
H A Dnv50_ir_lowering_helper.cpp134 hi->subOp = NV50_IR_SUBOP_MINMAX_HIGH;
138 lo->subOp = NV50_IR_SUBOP_MINMAX_LOW;
H A Dnv50_ir_from_nir.cpp1820 ->subOp = 2;
1821 mkOp1(OP_PIXLD, TYPE_U32, newDefs[0], sample)->subOp = NV50_IR_SUBOP_PIXLD_OFFSET;
1911 mkOp1(OP_VOTE, TYPE_U32, pred, pred)->subOp = getSubOp(op);
1919 mkOp1(OP_VOTE, TYPE_U32, newDefs[0], pred)->subOp = NV50_IR_SUBOP_VOTE_ANY;
1929 mkOp1(OP_VOTE, TYPE_U32, tmp, mkImm(1))->subOp = NV50_IR_SUBOP_VOTE_ANY;
1931 mkOp1(OP_BFIND, TYPE_U32, tmp, tmp)->subOp = NV50_IR_SUBOP_BFIND_SAMT;
1937 ->subOp = NV50_IR_SUBOP_SHFL_IDX;
2072 atom->subOp = getSubOp(op);
2100 atom->subOp = getSubOp(op);
2127 atom->subOp
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H A Dnv50_ir_from_tgsi.cpp1705 void handleATOM(Value *dst0[4], DataType, uint16_t subOp);
2928 Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp) argument
2956 if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2964 insn->subOp = subOp;
2976 if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2985 tex->subOp = subOp;
3009 insn->subOp = subOp;
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