Searched refs:subreg (Results 1 - 9 of 9) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_eu_validate.c774 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
775 ERROR_IF(subreg % 4 != 0,
780 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
783 dst_stride == 1 && subreg % 16 == 0),
807 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
817 ERROR_IF(subreg % exec_type_size != 0 &&
818 subreg % exec_type_size != 1,
819 "Destination subreg must be aligned to the size of the "
823 ERROR_IF(subreg % exec_type_size != 0,
824 "Destination subreg mus
895 unsigned vstride, width, hstride, element_size, subreg; local in function:general_restrictions_on_region_parameters
1148 unsigned subreg; local in function:special_restrictions_for_mixed_float_mode
1232 align1_access_mask(uint64_t access_mask[static32],unsigned exec_size,unsigned element_size,unsigned subreg,unsigned vstride,unsigned width,unsigned hstride) argument
1302 unsigned vstride, width, hstride, element_size, subreg; local in function:region_alignment_rules
1351 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:region_alignment_rules
1690 unsigned vstride, width, hstride, type_size, reg, subreg, address_mode; local in function:special_requirements_for_handling_double_precision_data_types
[all...]
H A Dbrw_reg.h905 brw_flag_reg(int reg, int subreg) argument
908 BRW_ARF_FLAG + reg, subreg);
912 brw_flag_subreg(unsigned subreg) argument
915 BRW_ARF_FLAG + subreg / 2, subreg % 2);
H A Dbrw_eu.c163 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg) argument
165 assert(subreg < 2);
166 p->current->flag_subreg = reg * 2 + subreg;
H A Dbrw_eu.h72 /* Flag subreg. Bottom bit is subreg, top bit is reg */
155 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_eu_validate.c861 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
862 ERROR_IF(subreg % 4 != 0,
867 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
870 dst_stride == 1 && subreg % 16 == 0),
894 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:general_restrictions_based_on_operand_types
904 ERROR_IF(subreg % exec_type_size != 0 &&
905 subreg % exec_type_size != 1,
906 "Destination subreg must be aligned to the size of the "
910 ERROR_IF(subreg % exec_type_size != 0,
911 "Destination subreg mus
982 unsigned vstride, width, hstride, element_size, subreg; local in function:general_restrictions_on_region_parameters
1235 unsigned subreg; local in function:special_restrictions_for_mixed_float_mode
1319 align1_access_mask(uint64_t access_mask[static32],unsigned exec_size,unsigned element_size,unsigned subreg,unsigned vstride,unsigned width,unsigned hstride) argument
1389 unsigned vstride, width, hstride, element_size, subreg; local in function:region_alignment_rules
1438 unsigned subreg = brw_inst_dst_da1_subreg_nr(devinfo, inst); local in function:region_alignment_rules
1777 unsigned vstride, width, hstride, type_size, reg, subreg, address_mode; local in function:special_requirements_for_handling_double_precision_data_types
[all...]
H A Dbrw_reg.h898 brw_flag_reg(int reg, int subreg) argument
901 BRW_ARF_FLAG + reg, subreg);
905 brw_flag_subreg(unsigned subreg) argument
908 BRW_ARF_FLAG + subreg / 2, subreg % 2);
H A Dbrw_eu.cpp172 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg) argument
174 assert(subreg < 2);
175 p->current->flag_subreg = reg * 2 + subreg;
H A Dbrw_eu.h76 /* Flag subreg. Bottom bit is subreg, top bit is reg */
170 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
H A Dbrw_fs.cpp5617 const unsigned subreg = sample_mask_flag_subreg(v); local in function:emit_predicate_on_sample_mask
5621 sample_mask.nr == brw_flag_subreg(subreg).nr &&
5623 subreg + inst->group / 16).subnr);
5626 .MOV(brw_flag_subreg(subreg + inst->group / 16), sample_mask);
5638 inst->flag_subreg = subreg;

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