Searched refs:tess_offchip_ring_offset (Results 1 - 2 of 2) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_device.c | 2094 uint32_t tess_offchip_ring_offset,
2185 uint64_t tess_offchip_va = tess_va + tess_offchip_ring_offset;
2470 unsigned tess_offchip_ring_offset; local in function:radv_get_preamble_cs
2483 tess_offchip_ring_offset = align(tess_factor_ring_size, 64 * 1024);
2556 tess_offchip_ring_offset + tess_offchip_ring_size,
2611 tess_offchip_ring_offset,
2086 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_device.c | 3374 uint32_t tess_factor_ring_size, uint32_t tess_offchip_ring_offset,
3462 uint64_t tess_offchip_va = tess_va + tess_offchip_ring_offset;
3765 unsigned tess_offchip_ring_offset; local in function:radv_get_preamble_cs
3786 tess_offchip_ring_offset = align(tess_factor_ring_size, 64 * 1024);
3868 queue->device->ws, tess_offchip_ring_offset + tess_offchip_ring_size, 256,
3938 tess_offchip_ring_offset, tess_offchip_ring_size, tess_rings_bo);
3371 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument
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