Searched refs:tess_offchip_ring_size (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_device.c2095 uint32_t tess_offchip_ring_size,
2206 desc[6] = tess_offchip_ring_size;
2467 unsigned tess_factor_ring_size = 0, tess_offchip_ring_size = 0; local in function:radv_get_preamble_cs
2484 tess_offchip_ring_size = max_offchip_buffers *
2556 tess_offchip_ring_offset + tess_offchip_ring_size,
2612 tess_offchip_ring_size,
2086 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_pipe.c1046 sscreen->tess_offchip_ring_size = max_offchip_buffers *
H A Dsi_pipe.h459 unsigned tess_offchip_ring_size; member in struct:si_screen
H A Dsi_state_shaders.c3255 sctx->screen->tess_offchip_ring_size +
3267 sctx->screen->tess_offchip_ring_size;
H A Dsi_shader.c1179 unsigned tf_offset = ctx->screen->tess_offchip_ring_size;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_shader_llvm_tess.c353 unsigned tf_offset = ctx->screen->tess_offchip_ring_size;
H A Dsi_state_shaders.c3899 sctx->screen->tess_offchip_ring_size + sctx->screen->tess_factor_ring_size, 1 << 19);
3908 sctx->screen->tess_offchip_ring_size + sctx->screen->tess_factor_ring_size, 1 << 19);
3912 si_resource(sctx->tess_rings)->gpu_address + sctx->screen->tess_offchip_ring_size;
3972 si_resource(sctx->tess_rings_tmz)->gpu_address + sctx->screen->tess_offchip_ring_size;
H A Dsi_pipe.c1244 sscreen->tess_offchip_ring_size = max_offchip_buffers * sscreen->tess_offchip_block_dw_size * 4;
H A Dsi_pipe.h530 unsigned tess_offchip_ring_size; member in struct:si_screen
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_device.c3375 uint32_t tess_offchip_ring_size, struct radeon_winsys_bo *tess_rings_bo)
3480 desc[6] = tess_offchip_ring_size;
3762 unsigned tess_factor_ring_size = 0, tess_offchip_ring_size = 0; local in function:radv_get_preamble_cs
3787 tess_offchip_ring_size = max_offchip_buffers * queue->device->tess_offchip_block_dw_size * 4;
3868 queue->device->ws, tess_offchip_ring_offset + tess_offchip_ring_size, 256,
3938 tess_offchip_ring_offset, tess_offchip_ring_size, tess_rings_bo);
3371 fill_geom_tess_rings(struct radv_queue * queue,uint32_t * map,bool add_sample_positions,uint32_t esgs_ring_size,struct radeon_winsys_bo * esgs_ring_bo,uint32_t gsvs_ring_size,struct radeon_winsys_bo * gsvs_ring_bo,uint32_t tess_factor_ring_size,uint32_t tess_offchip_ring_offset,uint32_t tess_offchip_ring_size,struct radeon_winsys_bo * tess_rings_bo) argument

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