| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| H A D | xgi_dac.h | 39 void XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned *vclk);
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| H A D | xgi_vga.c | 71 unsigned int vclk[5]; local in function:XG40Init
195 /* Set vclk */
208 XGICalcClock(pScrn, clock, 2, vclk);
209 pReg->xgiRegs3C4[0x2B] = (vclk[Midx] - 1) & 0x7f ;
210 pReg->xgiRegs3C4[0x2B] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ;
213 pReg->xgiRegs3C4[0x2C] = (vclk[Nidx] -1) & 0x1f ;
215 if (vclk[Pidx] <= 4) {
217 pReg->xgiRegs3C4[0x2C] |= (vclk[Pidx] -1 ) << 5 ;
221 pReg->xgiRegs3C4[0x2C] |= ((vclk[Pidx] / 2) -1 ) << 5 ;
225 } /* end of set vclk */
[all...] |
| H A D | xgi_dac.c | 169 XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk) argument
191 * result in vclk[]
278 vclk[Midx] = bestM;
279 vclk[Nidx] = bestN;
280 vclk[VLDidx] = bestVLD;
281 vclk[Pidx] = bestP;
282 vclk[PSNidx] = bestPSN;
286 (float)(clock / 1000.), vclk[Midx], vclk[Nidx], vclk[VLDid
[all...] |
| H A D | vb_setmode.c | 778 double factor1,tempclock,vclk,temp1,min,clock; local in function:XGI_SetCRTVCLK
785 vclk=(double)dwPixelClock;
799 temp1=fabs(vclk-tempclock);
814 if ((min/vclk)<0.01)
878 double factor1,tempclock,vclk,temp1,min,clock; local in function:XGI_SetCRTVCLK
881 vclk=(double)dwPixelClock;
894 temp1=fabs(vclk-tempclock);
5008 unsigned vclk; local in function:XGI_GetVCLKPtr
5017 vclk = pVBInfo->LCDCapList[index].LCD_VCLK;
5020 return vclk;
[all...] |
| /xsrc/external/mit/xf86-video-sis/dist/src/ |
| H A D | sis_dac.h | 37 unsigned int *vclk);
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| H A D | initextx.c | 42 unsigned int vclk[5]; local in function:SiS_MakeClockRegs
61 SiSCalcClock(pScrn, clock, 2, vclk);
62 (*p2b) = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
63 (*p2b) |= (vclk[Midx] - 1) & 0x7f;
64 (*p2c) = (vclk[Nidx] - 1) & 0x1f;
65 if(vclk[Pidx] <= 4) {
67 (*p2c) |= ((vclk[Pidx] - 1) & 3) << 5;
70 (*p2c) |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
75 clock, vclk[Midx], vclk[Nid
[all...] |
| H A D | sis_vga.c | 187 unsigned int vclk[5]; local in function:SISInit
510 SiSCalcClock(pScrn, clock, 2, vclk);
518 pReg->sisRegs3C4[0x2A] = (vclk[Midx] - 1) & 0x7f;
519 pReg->sisRegs3C4[0x2A] |= ((vclk[VLDidx] == 2) ? 1 : 0) << 7;
522 pReg->sisRegs3C4[0x2B] = (vclk[Nidx] - 1) & 0x1f;
524 if(vclk[Pidx] <= 4){
526 pReg->sisRegs3C4[0x2B] |= (vclk[Pidx] - 1) << 5;
530 pReg->sisRegs3C4[0x2B] |= ((vclk[Pidx] / 2) - 1) << 5;
646 SiSCalcClock(pScrn, pSiS->MemClock, 1, vclk);
648 pReg->sisRegs3C4[0x28] = (vclk[Mid
[all...] |
| H A D | initextx.h | 480 extern void SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk);
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| H A D | sis_dac.c | 219 SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk) argument
238 * result in vclk[]
367 vclk[Midx] = bestM;
368 vclk[Nidx] = bestN;
369 vclk[VLDidx] = bestVLD;
370 vclk[Pidx] = bestP;
371 vclk[PSNidx] = bestPSN;
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| /xsrc/external/mit/xf86-video-chips/dist/src/ |
| H A D | ct_driver.c | 169 unsigned char *vclk);
2178 unsigned char vclk[3]; local in function:chipsPreInitHiQV
2181 chipsCalcClock(pScrn, MemClk->Clk, vclk);
2182 MemClk->M = vclk[1] + 2;
2183 MemClk->N = vclk[2] + 2;
2184 MemClk->P = (vclk[0] & 0x70) >> 4;
2185 MemClk->PSN = (vclk[0] & 0x1) ? 1 : 4;
2186 MemClk->xrCC = vclk[1];
2187 MemClk->xrCD = vclk[2];
2188 MemClk->xrCE = 0x80 || vclk[
4875 unsigned char vclk[3]; local in function:chipsClockLoad
5011 chipsCalcClock(ScrnInfoPtr pScrn,int Clock,unsigned char * vclk) argument
[all...] |
| /xsrc/external/mit/xf86-video-rendition/dist/src/ |
| H A D | vmodes.c | 45 #define FIFOSIZE(vclk, Bpp) (((vclk * Bpp) > FIFOSIZE_THRESH) ? 128 : 64)
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_driver.c | 1016 float hz, prev_xtal, vclk, xtal, mpll, spll; local in function:RADEONProbePLLParameters
1060 vclk = (float)(hTotal * (float)(vTotal * hz));
1112 xtal = (int)(vclk *(float)denom/(float)num);
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