Searched refs:vs_state_bits (Results 1 - 7 of 7) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_shader_internal.h101 struct ac_arg vs_state_bits; member in struct:si_shader_context
H A Dsi_shader_llvm_tess.c67 return si_unpack_param(ctx, ctx->vs_state_bits, 11, 13);
166 return si_unpack_param(ctx, ctx->vs_state_bits, 24, 8);
925 ret = si_insert_input_ret(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);
H A Dgfx10_shader_ngg.c97 LLVMValueRef num = si_unpack_param(ctx, ctx->vs_state_bits, 2, 2);
984 LLVMValueRef small_prim_precision = si_unpack_param(ctx, ctx->vs_state_bits, 7, 4);
1216 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);
1414 LLVMValueRef provoking_vtx_in_prim = si_unpack_param(ctx, ctx->vs_state_bits, 4, 2);
1431 tmp = si_unpack_param(ctx, ctx->vs_state_bits, 6, 1);
1812 tmp = si_unpack_param(ctx, ctx->vs_state_bits, 6, 1);
1934 builder, LLVMIntEQ, si_unpack_param(ctx, ctx->vs_state_bits, 4, 2), ctx->ac.i32_0, "");
H A Dsi_shader.c268 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
430 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
538 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
601 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
H A Dsi_shader_llvm_vs.c532 LLVMValueRef cond = ac_get_arg(&ctx->ac, ctx->vs_state_bits);
982 LLVMValueRef indexed = si_unpack_param(ctx, ctx->vs_state_bits, 1, 1);
H A Dsi_shader_llvm_gs.c122 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D21.0.0.rst2058 - radeonsi: read vs_state_bits in vs_prolog correctly

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