Searched refs:x4 (Results 1 - 25 of 658) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/mesa/sparc/
H A Dsparc_matrix.h53 ldd [BASE + ( 0 * 0x4)], M0; \
54 ldd [BASE + ( 2 * 0x4)], M2; \
55 ldd [BASE + (12 * 0x4)], M12; \
56 ldd [BASE + (14 * 0x4)], M14
59 ldd [BASE + ( 0 * 0x4)], M0; \
60 ldd [BASE + (12 * 0x4)], M12
63 ld [BASE + ( 0 * 0x4)], M0; \
64 ldd [BASE + (12 * 0x4)], M12
67 ldd [BASE + ( 0 * 0x4)], M0; \
68 ld [BASE + ( 2 * 0x4)], M
[all...]
/xsrc/external/mit/MesaLib/dist/src/mesa/sparc/
H A Dsparc_matrix.h36 ldd [BASE + ( 0 * 0x4)], M0; \
37 ldd [BASE + ( 2 * 0x4)], M2; \
38 ldd [BASE + (12 * 0x4)], M12; \
39 ldd [BASE + (14 * 0x4)], M14
42 ldd [BASE + ( 0 * 0x4)], M0; \
43 ldd [BASE + (12 * 0x4)], M12
46 ld [BASE + ( 0 * 0x4)], M0; \
47 ldd [BASE + (12 * 0x4)], M12
50 ldd [BASE + ( 0 * 0x4)], M0; \
51 ld [BASE + ( 2 * 0x4)], M
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/hw/
H A Dstate_3d.xml.h176 #define VIVS_VS_OUTPUT(i0) (0x00000810 + 0x4*(i0))
192 #define VIVS_VS_INPUT(i0) (0x00000820 + 0x4*(i0))
274 #define VIVS_VS_HALTI5_UNK00898(i0) (0x00000898 + 0x4*(i0))
302 #define VIVS_VS_HALTI5_INPUT(i0) (0x000008c0 + 0x4*(i0))
318 #define VIVS_VS_HALTI5_OUTPUT(i0) (0x000008e0 + 0x4*(i0))
334 #define VIVS_VS_INST_MEM(i0) (0x00004000 + 0x4*(i0))
338 #define VIVS_VS_UNIFORMS(i0) (0x00005000 + 0x4*(i0))
504 #define VIVS_PA_SHADER_ATTRIBUTES(i0) (0x00000a40 + 0x4*(i0))
525 #define VIVS_PA_VARYING_NUM_COMPONENTS(i0) (0x00000a90 + 0x4*(i0))
566 #define VIVS_RA_MULTISAMPLE_UNK00E10(i0) (0x00000e10 + 0x4*(i
[all...]
H A Dstate.xml.h73 #define VIVS_FE_VERTEX_ELEMENT_CONFIG(i0) (0x00000600 + 0x4*(i0))
192 #define VIVS_FE_VERTEX_STREAMS(i0) (0x00000000 + 0x4*(i0))
196 #define VIVS_FE_VERTEX_STREAMS_BASE_ADDR(i0) (0x00000680 + 0x4*(i0))
198 #define VIVS_FE_VERTEX_STREAMS_CONTROL(i0) (0x000006a0 + 0x4*(i0))
200 #define VIVS_FE_GENERIC_ATTRIB(i0) (0x00000000 + 0x4*(i0))
204 #define VIVS_FE_GENERIC_ATTRIB_UNK006C0(i0) (0x000006c0 + 0x4*(i0))
206 #define VIVS_FE_GENERIC_ATTRIB_UNK00700(i0) (0x00000700 + 0x4*(i0))
208 #define VIVS_FE_GENERIC_ATTRIB_UNK00740(i0) (0x00000740 + 0x4*(i0))
210 #define VIVS_FE_GENERIC_ATTRIB_SCALE(i0) (0x00000780 + 0x4*(i0))
214 #define VIVS_FE_HALTI5_UNK007D0(i0) (0x000007d0 + 0x4*(i
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/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/r800/
H A Dsiaddrlib.cpp232 ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, log2BytesPP + bankXStart + 1); local in function:Addr::V1::SiLib::ComputeBankEquation
241 x4.value = (threshX > bankXStart + 1) ? x4.value : 0;
258 pEquation->xor2[1] = x4;
270 pEquation->xor2[1] = x4;
280 pEquation->addr[1] = x4;
292 pEquation->addr[1] = x4;
313 pEquation->xor2[1] = x4;
323 pEquation->xor2[1] = x4;
331 pEquation->addr[1] = x4;
461 ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, 4 + log2BytesPP); local in function:Addr::V1::SiLib::ComputePipeEquation
687 UINT_32 x4 = _BIT(tx,1); local in function:Addr::V1::SiLib::ComputePipeFromCoord
846 UINT_32 x4 = 0; local in function:Addr::V1::SiLib::ComputeTileCoordFromPipeAndElemIdx
2542 UINT_32 x4 = 0; local in function:Addr::V1::SiLib::HwlComputeSurfaceCoord2DFromBankPipe
2651 UINT_32 x4 = _BIT(tileX, 1); local in function:Addr::V1::SiLib::HwlPreAdjustBank
[all...]
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/r800/
H A Dsiaddrlib.cpp231 ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, log2BytesPP + bankXStart + 1); local in function:Addr::V1::SiLib::ComputeBankEquation
240 x4.value = (threshX > bankXStart + 1) ? x4.value : 0;
257 pEquation->xor2[1] = x4;
269 pEquation->xor2[1] = x4;
279 pEquation->addr[1] = x4;
291 pEquation->addr[1] = x4;
312 pEquation->xor2[1] = x4;
322 pEquation->xor2[1] = x4;
330 pEquation->addr[1] = x4;
460 ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, 4 + log2BytesPP); local in function:Addr::V1::SiLib::ComputePipeEquation
686 UINT_32 x4 = _BIT(tx,1); local in function:Addr::V1::SiLib::ComputePipeFromCoord
845 UINT_32 x4 = 0; local in function:Addr::V1::SiLib::ComputeTileCoordFromPipeAndElemIdx
2542 UINT_32 x4 = 0; local in function:Addr::V1::SiLib::HwlComputeSurfaceCoord2DFromBankPipe
2651 UINT_32 x4 = _BIT(tileX, 1); local in function:Addr::V1::SiLib::HwlPreAdjustBank
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/hw/
H A Dstate_3d.xml.h177 #define VIVS_VS_OUTPUT(i0) (0x00000810 + 0x4*(i0))
193 #define VIVS_VS_INPUT(i0) (0x00000820 + 0x4*(i0))
275 #define VIVS_VS_HALTI5_UNK00898(i0) (0x00000898 + 0x4*(i0))
303 #define VIVS_VS_HALTI5_INPUT(i0) (0x000008c0 + 0x4*(i0))
319 #define VIVS_VS_HALTI5_OUTPUT(i0) (0x000008e0 + 0x4*(i0))
335 #define VIVS_VS_INST_MEM(i0) (0x00004000 + 0x4*(i0))
339 #define VIVS_VS_UNIFORMS(i0) (0x00005000 + 0x4*(i0))
505 #define VIVS_PA_SHADER_ATTRIBUTES(i0) (0x00000a40 + 0x4*(i0))
526 #define VIVS_PA_VARYING_NUM_COMPONENTS(i0) (0x00000a90 + 0x4*(i0))
570 #define VIVS_RA_MULTISAMPLE_UNK00E10(i0) (0x00000e10 + 0x4*(i
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H A Dstate.xml.h75 #define VIVS_FE_VERTEX_ELEMENT_CONFIG(i0) (0x00000600 + 0x4*(i0))
195 #define VIVS_FE_VERTEX_STREAMS(i0) (0x00000000 + 0x4*(i0))
199 #define VIVS_FE_VERTEX_STREAMS_BASE_ADDR(i0) (0x00000680 + 0x4*(i0))
201 #define VIVS_FE_VERTEX_STREAMS_CONTROL(i0) (0x000006a0 + 0x4*(i0))
203 #define VIVS_FE_GENERIC_ATTRIB(i0) (0x00000000 + 0x4*(i0))
207 #define VIVS_FE_GENERIC_ATTRIB_UNK006C0(i0) (0x000006c0 + 0x4*(i0))
209 #define VIVS_FE_GENERIC_ATTRIB_UNK00700(i0) (0x00000700 + 0x4*(i0))
211 #define VIVS_FE_GENERIC_ATTRIB_UNK00740(i0) (0x00000740 + 0x4*(i0))
213 #define VIVS_FE_GENERIC_ATTRIB_SCALE(i0) (0x00000780 + 0x4*(i0))
225 #define VIVS_FE_HALTI5_UNK007D0(i0) (0x000007d0 + 0x4*(i
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/llvmpipe/
H A Dlp_debug.h41 #define DEBUG_TEX 0x4
56 #define PERF_NO_MIPMAPS 0x4 /* MIP_FILTER_NONE always */
/xsrc/external/mit/MesaLib/dist/src/mesa/math/
H A Dm_vector_asm.h33 #define VEC_DIRTY_2 0x4
H A Dm_copy_tmp.h55 COPY_FUNC( 0x4 )
74 _mesa_copy_tab[0x4] = TAG2(copy, 0x4);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_2d.xml.h157 #define NVC0_2D_UNK0270(i0) (0x00000270 + 0x4*(i0))
221 #define NVC0_2D_UNK02B8(i0) (0x000002b8 + 0x4*(i0))
243 #define NV50_2D_PATTERN_BITMAP_COLOR(i0) (0x000002f0 + 0x4*(i0))
247 #define NV50_2D_PATTERN_BITMAP(i0) (0x000002f8 + 0x4*(i0))
251 #define NV50_2D_PATTERN_X8R8G8B8(i0) (0x00000300 + 0x4*(i0))
261 #define NV50_2D_PATTERN_R5G6B5(i0) (0x00000400 + 0x4*(i0))
277 #define NV50_2D_PATTERN_X1R5G5B5(i0) (0x00000480 + 0x4*(i0))
293 #define NV50_2D_PATTERN_Y8(i0) (0x00000500 + 0x4*(i0))
305 #define NVC0_2D_DRAW_COLOR_LONG(i0) (0x00000540 + 0x4*(i0))
426 #define NVC0_2D_FIRMWARE(i0) (0x000008e0 + 0x4*(i
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H A Dnv50_compute.xml.h140 #define NV50_COMPUTE_CB_DATA(i0) (0x0000023c + 0x4*(i0))
205 #define NV50_COMPUTE_MP_PM_SET(i0) (0x000002d0 + 0x4*(i0))
209 #define NV50_COMPUTE_MP_PM_CONTROL(i0) (0x000002e0 + 0x4*(i0))
274 #define NV50_COMPUTE_UNK0334(i0) (0x00000334 + 0x4*(i0))
278 #define NV50_COMPUTE_UNK0340(i0) (0x00000340 + 0x4*(i0))
282 #define NV50_COMPUTE_UNK0348(i0) (0x00000348 + 0x4*(i0))
286 #define NV50_COMPUTE_UNK0350(i0) (0x00000350 + 0x4*(i0))
327 #define NV50_COMPUTE_UNK038C(i0) (0x0000038c + 0x4*(i0))
333 #define NV50_COMPUTE_UNK039C(i0) (0x0000039c + 0x4*(i0))
435 #define NV50_COMPUTE_USER_PARAM(i0) (0x00000600 + 0x4*(i
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/xsrc/external/mit/MesaLib.old/dist/src/mesa/math/
H A Dm_copy_tmp.h55 COPY_FUNC( 0x4 )
74 _mesa_copy_tab[0x4] = TAG2(copy, 0x4);
/xsrc/external/mit/MesaLib.old/dist/src/egl/main/
H A Deglglobals.h43 _EGL_DEBUG_BIT_WARN = 0x4,
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/util/
H A Du_dirty_flags.h10 #define U_NEW_FS 0x4
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/util/
H A Du_dirty_flags.h10 #define U_NEW_FS 0x4
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_debug.h43 #define DBG_ATOMS 0x4
/xsrc/external/mit/MesaLib/dist/src/egl/main/
H A Deglglobals.h43 _EGL_DEBUG_BIT_WARN = 0x4,
/xsrc/external/mit/MesaGLUT/dist/src/glut/beos/
H A Dglut_tr24.c11 0xe0,0x0,0xf0,0x0,0x18,0x0,0x8,0x0,0xc,0x0,0x4,0x0,0xe,0x0,0xe,0x0,
31 0xe0,0x0,0xf0,0x0,0x18,0x0,0x8,0x0,0xc,0x0,0x4,0x0,0xe,0x0,0xe,0x0,
230 0xc1,0x80,0x41,0x80,0x63,0x0,0x1e,0x0,0x0,0x0,0x4,0x0,0x18,0x0,0x70,0x0,
307 0x3,0x0,0x63,0x0,0x67,0x0,0x3e,0x0,0x0,0x0,0x4,0x0,0x18,0x0,0x70,0x0,
346 0x7,0xe0,0x1c,0x30,0x18,0x8,0x30,0x8,0x30,0x4,0x30,0x4,0x30,0x4,0x30,0x4,
347 0x30,0x4,0x30,0x4,
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/xsrc/external/mit/MesaGLUT/dist/src/glut/glx/
H A Dglut_tr24.c11 0xe0,0x0,0xf0,0x0,0x18,0x0,0x8,0x0,0xc,0x0,0x4,0x0,0xe,0x0,0xe,0x0,
31 0xe0,0x0,0xf0,0x0,0x18,0x0,0x8,0x0,0xc,0x0,0x4,0x0,0xe,0x0,0xe,0x0,
230 0xc1,0x80,0x41,0x80,0x63,0x0,0x1e,0x0,0x0,0x0,0x4,0x0,0x18,0x0,0x70,0x0,
307 0x3,0x0,0x63,0x0,0x67,0x0,0x3e,0x0,0x0,0x0,0x4,0x0,0x18,0x0,0x70,0x0,
346 0x7,0xe0,0x1c,0x30,0x18,0x8,0x30,0x8,0x30,0x4,0x30,0x4,0x30,0x4,0x30,0x4,
347 0x30,0x4,0x30,0x4,
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_compute.xml.h140 #define NV50_COMPUTE_CB_DATA(i0) (0x0000023c + 0x4*(i0))
205 #define NV50_COMPUTE_MP_PM_SET(i0) (0x000002d0 + 0x4*(i0))
209 #define NV50_COMPUTE_MP_PM_CONTROL(i0) (0x000002e0 + 0x4*(i0))
274 #define NV50_COMPUTE_UNK0334(i0) (0x00000334 + 0x4*(i0))
278 #define NV50_COMPUTE_UNK0340(i0) (0x00000340 + 0x4*(i0))
282 #define NV50_COMPUTE_UNK0348(i0) (0x00000348 + 0x4*(i0))
286 #define NV50_COMPUTE_UNK0350(i0) (0x00000350 + 0x4*(i0))
327 #define NV50_COMPUTE_UNK038C(i0) (0x0000038c + 0x4*(i0))
333 #define NV50_COMPUTE_UNK039C(i0) (0x0000039c + 0x4*(i0))
435 #define NV50_COMPUTE_USER_PARAM(i0) (0x00000600 + 0x4*(i
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_reg.h46 #define XY_COLOR_BLT (2<<29|0x50<<22|(0x4))
54 #define SRC_COPY_BLT_CMD (2<<29|0x43<<22|0x4)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_reg.h46 #define XY_COLOR_BLT (2<<29|0x50<<22|(0x4))
54 #define SRC_COPY_BLT_CMD (2<<29|0x43<<22|0x4)
/xsrc/external/mit/xf86-video-r128/dist/src/
H A Dr128_sarea.h65 #define R128_DEPTH 0x4
72 #define R128_TRIANGLES 0x4

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