Searched refs:NVA0C0_QMDV00_06_VAL_SET (Results 1 - 1 of 1) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nvc0/ |
| H A D | nve4_compute.c | 36 #define NVA0C0_QMDV00_06_VAL_SET(p,a...) NVVAL_MW_SET((p), NVA0C0, QMDV00_06, ##a) macro
594 NVA0C0_QMDV00_06_VAL_SET(qmd, CONSTANT_BUFFER_ADDR_LOWER, index, address);
595 NVA0C0_QMDV00_06_VAL_SET(qmd, CONSTANT_BUFFER_ADDR_UPPER, index, address >> 32);
596 NVA0C0_QMDV00_06_VAL_SET(qmd, CONSTANT_BUFFER_SIZE, index, size);
639 NVA0C0_QMDV00_06_VAL_SET(qmd, SASS_VERSION, 0x30);
641 NVA0C0_QMDV00_06_VAL_SET(qmd, PROGRAM_OFFSET, cp->code_base);
643 NVA0C0_QMDV00_06_VAL_SET(qmd, CTA_RASTER_WIDTH, info->grid[0]);
644 NVA0C0_QMDV00_06_VAL_SET(qmd, CTA_RASTER_HEIGHT, info->grid[1]);
645 NVA0C0_QMDV00_06_VAL_SET(qmd, CTA_RASTER_DEPTH, info->grid[2]);
646 NVA0C0_QMDV00_06_VAL_SET(qm
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