| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_gv100.cpp | 39 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred);
103 bld.mkOp3(OP_SELP, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1), pred);
197 i = bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), bld.mkImm(0), met, pred);
339 bld.mkOp3(OP_SELP, TYPE_U32, dest[0], src0[0], src1[0], pred);
340 bld.mkOp3(OP_SELP, TYPE_U32, dest[1], src0[1], src1[1], pred);
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| H A D | nv50_ir_inlines.h | 286 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
293 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
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| H A D | nv50_ir_target_gm107.cpp | 228 case OP_SELP:
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| H A D | nv50_ir_target_nv50.cpp | 117 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
450 case OP_SELP:
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| H A D | nv50_ir_target_gv100.cpp | 36 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
342 case OP_SELP: return &opInfo_SEL;
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| H A D | nv50_ir.h | 85 OP_SELP, // dst = src2 ? src0 : src1 enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_build_util.cpp | 618 case OP_SELP: srcNr = 3; break;
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| H A D | nv50_ir_target_nvc0.cpp | 199 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
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| H A D | nv50_ir_emit_gk110.cpp | 457 if (i->op == OP_SELP) {
2610 case OP_SELP:
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| H A D | nv50_ir_lowering_nvc0.cpp | 714 if (i->op == OP_SELP && s == 2) {
1585 bld.mkOp3(OP_SELP, TYPE_U32, bld.getSSA(), ld->getDef(0),
3061 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), ld->getDef(0), masked,
3133 bld.mkOp3(OP_SELP, TYPE_U64, dst, zero, dst, pred);
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| H A D | nv50_ir_emit_gv100.cpp | 1921 case OP_SELP:
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| H A D | nv50_ir_emit_nvc0.cpp | 427 if (i->op == OP_SELP) {
428 // OP_SELP is used to implement shared+atomics on Fermi.
2780 case OP_SELP:
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| H A D | nv50_ir_lowering_nv50.cpp | 1511 bld.mkOp3(OP_SELP, TYPE_U32, bld.getSSA(), atom->getSrc(2),
2216 case OP_SELP:
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| H A D | nv50_ir_emit_nv50.cpp | 2135 case OP_SELP:
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_inlines.h | 286 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
293 if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
|
| H A D | nv50_ir_target_gm107.cpp | 228 case OP_SELP:
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| H A D | nv50_ir_target_nv50.cpp | 117 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
439 case OP_SELP:
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| H A D | nv50_ir.h | 83 OP_SELP, // dst = src2 ? src0 : src1 enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_build_util.cpp | 588 case OP_SELP: srcNr = 3; break;
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| H A D | nv50_ir_lowering_nvc0.cpp | 703 if (i->op == OP_SELP && s == 2) {
1571 bld.mkOp3(OP_SELP, TYPE_U32, bld.getSSA(), ld->getDef(0),
2847 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), ld->getDef(0), masked,
2919 bld.mkOp3(OP_SELP, TYPE_U64, dst, zero, dst, pred);
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| H A D | nv50_ir_target_nvc0.cpp | 199 OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
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| H A D | nv50_ir_emit_gk110.cpp | 459 if (i->op == OP_SELP) {
2603 case OP_SELP:
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| H A D | nv50_ir_lowering_nv50.cpp | 1419 case OP_SELP:
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| H A D | nv50_ir_emit_nvc0.cpp | 429 if (i->op == OP_SELP) {
430 // OP_SELP is used to implement shared+atomics on Fermi.
2773 case OP_SELP:
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| H A D | nv50_ir_emit_nv50.cpp | 2048 case OP_SELP:
|