Searched refs:PKT3_SET_SH_REG (Results 1 - 22 of 22) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600d_common.h87 #define PKT3_SET_SH_REG 0x76 /* SI and later */ macro
H A Dr600_cs.h174 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
H A Deg_debug.c165 op == PKT3_SET_SH_REG)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600d_common.h87 #define PKT3_SET_SH_REG 0x76 /* SI and later */ macro
H A Dr600_cs.h174 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
H A Deg_debug.c165 op == PKT3_SET_SH_REG)
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cs.h103 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
124 opcode = PKT3_SET_SH_REG;
H A Dradv_private.h1619 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, pointer_count * (use_32bit_pointers ? 1 : 2), 0));
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cs.h89 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
H A Dradv_private.h1246 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, pointer_count * (use_32bit_pointers ? 1 : 2), 0));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c62 opcode = PKT3_SET_SH_REG;
H A Dsi_build_pm4.h116 radeon_emit(PKT3(PKT3_SET_SH_REG, num, 0)); \
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h78 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
H A Dsi_pm4.c59 opcode = PKT3_SET_SH_REG;
H A Dsi_descriptors.c2099 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, pointer_count, 0));
/xsrc/external/mit/MesaLib/dist/src/amd/common/
H A Dsid.h224 #define PKT3_SET_SH_REG 0x76 macro
H A Dac_debug.c272 op == PKT3_SET_UCONFIG_REG_INDEX || op == PKT3_SET_SH_REG)
291 case PKT3_SET_SH_REG:
/xsrc/external/mit/libdrm/dist/tests/amdgpu/
H A Dbasic_tests.c292 #define PKT3_SET_SH_REG 0x76 macro
2321 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2);
2327 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2);
2367 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1);
2371 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2);
2376 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1);
2380 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 3);
/xsrc/external/mit/MesaLib.old/dist/src/amd/common/
H A Dac_debug.c237 op == PKT3_SET_SH_REG)
259 case PKT3_SET_SH_REG:
H A Dsid.h212 #define PKT3_SET_SH_REG 0x76 macro
/xsrc/external/mit/MesaLib.old/src/amd/common/
H A Dsid_tables.h95 {654, PKT3_SET_SH_REG},
/xsrc/external/mit/MesaLib/src/amd/common/
H A Dsid_tables.h100 {732, PKT3_SET_SH_REG},
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