Searched refs:USE_32_PIXEL_DISPATCH (Results 1 - 7 of 7) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.c65 #define USE_32_PIXEL_DISPATCH 0 macro
67 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
3715 if (USE_32_PIXEL_DISPATCH) {
H A Dgen7_render.c65 #define USE_32_PIXEL_DISPATCH 0 macro
67 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
3952 if (USE_32_PIXEL_DISPATCH) {
H A Dgen8_render.c64 #define USE_32_PIXEL_DISPATCH 0 macro
66 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
4060 if (USE_32_PIXEL_DISPATCH) {
H A Dgen9_render.c64 #define USE_32_PIXEL_DISPATCH 0 macro
66 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
4158 if (USE_32_PIXEL_DISPATCH) {
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.c65 #define USE_32_PIXEL_DISPATCH 0 macro
67 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
3634 if (USE_32_PIXEL_DISPATCH) {
H A Dgen7_render.c67 #define USE_32_PIXEL_DISPATCH 0 macro
69 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
3859 if (USE_32_PIXEL_DISPATCH) {
H A Dgen8_render.c64 #define USE_32_PIXEL_DISPATCH 0 macro
66 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH
3926 if (USE_32_PIXEL_DISPATCH) {

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