Searched refs:gp (Results 1 - 25 of 107) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/loader/
H A Dpci_id_driver_map.c35 struct drm_nouveau_getparam gp = { NOUVEAU_GETPARAM_CHIPSET_ID, 0 }; local in function:nouveau_chipset
38 ret = drmCommandWriteRead(fd, DRM_NOUVEAU_GETPARAM, &gp, sizeof(gp));
42 return gp.value;
/xsrc/external/mit/MesaLib/dist/src/loader/
H A Dpci_id_driver_map.c37 struct drm_nouveau_getparam gp = { NOUVEAU_GETPARAM_CHIPSET_ID, 0 }; local in function:nouveau_chipset
40 ret = drmCommandWriteRead(fd, DRM_NOUVEAU_GETPARAM, &gp, sizeof(gp));
44 return gp.value;
/xsrc/external/mit/MesaLib/dist/src/broadcom/drm-shim/
H A Dvc4_noop.c70 struct drm_vc4_get_param *gp = arg; local in function:vc4_ioctl_get_param
76 switch (gp->param) {
81 gp->value = 1;
86 gp->value = 0;
93 if (gp->param < ARRAY_SIZE(param_map) && param_map[gp->param]) {
94 gp->value = param_map[gp->param];
98 fprintf(stderr, "Unknown DRM_IOCTL_VC4_GET_PARAM %d\n", gp->param);
H A Dv3d_noop.c110 struct drm_v3d_get_param *gp = arg; local in function:v3d_ioctl_get_param
121 switch (gp->param) {
123 gp->value = 1;
129 if (gp->param < ARRAY_SIZE(v3d42_reg_map) && v3d42_reg_map[gp->param]) {
130 gp->value = v3d42_reg_map[gp->param];
134 fprintf(stderr, "Unknown DRM_IOCTL_V3D_GET_PARAM %d\n", gp->param);
H A Dv3dx.c263 struct drm_v3d_get_param *gp = arg; local in function:v3dX
274 switch (gp->param) {
276 gp->value = 1;
280 if (gp->param < ARRAY_SIZE(reg_map) && reg_map[gp->param]) {
281 gp->value = V3D_READ(reg_map[gp->param]);
285 fprintf(stderr, "Unknown DRM_IOCTL_V3D_GET_PARAM %d\n", gp->param);
/xsrc/external/mit/MesaLib/dist/src/panfrost/drm-shim/
H A Dpanfrost_noop.c44 struct drm_panfrost_get_param *gp = arg; local in function:pan_ioctl_get_param
46 switch (gp->param) {
49 gp->value = 0x860;
52 gp->value = 0;
56 gp->value = 0xF;
59 gp->value = 0;
62 gp->value = 0;
65 gp->value = 0x809;
68 fprintf(stderr, "Unknown DRM_IOCTL_PANFROST_GET_PARAM %d\n", gp->param);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_gs_surface_state.c44 struct brw_program *gp = local in function:brw_upload_gs_pull_constants
47 if (!gp)
55 brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program,
98 const struct gl_program *gp = brw->programs[MESA_SHADER_GEOMETRY]; local in function:brw_upload_gs_image_surfaces
100 if (gp) {
102 brw_upload_image_surfaces(brw, gp, &brw->gs.base,
H A Dbrw_gs.c54 struct brw_program *gp,
68 nir_shader *nir = nir_shader_clone(mem_ctx, gp->program.nir);
70 assign_gs_binding_table_offsets(devinfo, &gp->program, &prog_data);
72 brw_nir_setup_glsl_uniforms(mem_ctx, nir, &gp->program,
82 gp->program.info.separate_shader);
86 st_index = brw_get_shader_time_index(brw, &gp->program, ST_GS, true);
96 &prog_data, nir, &gp->program, st_index, &error_str);
98 ralloc_strcat(&gp->program.sh.data->InfoLog, error_str);
106 if (gp->compiled_once) {
107 brw_debug_recompile(brw, MESA_SHADER_GEOMETRY, gp
53 brw_codegen_gs_prog(struct brw_context * brw,struct brw_program * gp,struct brw_gs_prog_key * key) argument
148 struct brw_program *gp = local in function:brw_gs_populate_key
165 struct brw_program *gp = local in function:brw_upload_gs_prog
[all...]
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_gs_surface_state.c44 struct brw_program *gp = local in function:brw_upload_gs_pull_constants
47 if (!gp)
55 brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program,
98 const struct gl_program *gp = brw->programs[MESA_SHADER_GEOMETRY]; local in function:brw_upload_gs_image_surfaces
100 if (gp) {
102 brw_upload_image_surfaces(brw, gp, &brw->gs.base,
H A Dbrw_gs.c86 struct brw_program *gp,
100 nir_shader *nir = nir_shader_clone(mem_ctx, gp->program.nir);
102 assign_gs_binding_table_offsets(devinfo, &gp->program, &prog_data);
104 brw_nir_setup_glsl_uniforms(mem_ctx, nir, &gp->program,
116 gp->program.info.separate_shader, 1);
119 brw_gfx6_xfb_setup(gp->program.sh.LinkedTransformFeedback,
124 st_index = brw_get_shader_time_index(brw, &gp->program, ST_GS, true);
137 ralloc_strcat(&gp->program.sh.data->InfoLog, error_str);
145 if (gp->compiled_once) {
146 brw_debug_recompile(brw, MESA_SHADER_GEOMETRY, gp
85 brw_codegen_gs_prog(struct brw_context * brw,struct brw_program * gp,struct brw_gs_prog_key * key) argument
187 struct brw_program *gp = local in function:brw_gs_populate_key
201 struct brw_program *gp = local in function:brw_upload_gs_prog
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_winsys.c22 struct drm_i915_getparam gp; local in function:i915_drm_get_device_id
24 gp.param = I915_PARAM_CHIPSET_ID;
25 gp.value = (int *)device_id;
27 ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/drm-shim/
H A Dlima_noop.c44 struct drm_lima_get_param *gp = arg; local in function:lima_ioctl_get_param
46 switch (gp->param) {
48 gp->value = DRM_LIMA_PARAM_GPU_ID_MALI450;
51 gp->value = 6;
54 fprintf(stderr, "Unknown DRM_IOCTL_LIMA_GET_PARAM %d\n", gp->param);
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_winsys.c22 struct drm_i915_getparam gp; local in function:i915_drm_get_device_id
24 gp.param = I915_PARAM_CHIPSET_ID;
25 gp.value = (int *)device_id;
27 ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/
H A DAndroid.mk26 ir/gp/codegen.c \
27 ir/gp/codegen.h \
28 ir/gp/disasm.c \
29 ir/gp/gpir.h \
30 ir/gp/instr.c \
31 ir/gp/lower.c \
32 ir/gp/nir.c \
33 ir/gp/node.c \
34 ir/gp/physical_regalloc.c \
35 ir/gp/reduce_schedule
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Dintel_noop_drm_shim.c141 drm_i915_getparam_t *gp = arg; local in function:i915_ioctl_get_param
143 switch (gp->param) {
145 *gp->value = i915.device_id;
148 *gp->value = 0;
151 *gp->value = i915.devinfo.timestamp_frequency;
155 *gp->value = I915_GEM_PPGTT_NONE;
157 *gp->value = I915_GEM_PPGTT_ALIASING;
159 *gp->value = I915_GEM_PPGTT_FULL;
163 *gp->value = 8; /* gfx2/3 value, unused in brw/iris */
167 *gp
[all...]
/xsrc/external/mit/MesaLib/dist/src/nouveau/drm-shim/
H A Dnouveau_noop.c144 struct drm_nouveau_getparam *gp = arg; local in function:nouveau_ioctl_get_param
146 switch (gp->param) {
148 gp->value = device_info.chip_id;
151 gp->value = 0x10de;
154 gp->value = 0x1004;
157 gp->value = 2 /* NV_PCIE */;
160 gp->value = 3ULL << 30;
163 gp->value = 1ULL << 40;
166 gp->value = 0;
169 gp
[all...]
/xsrc/external/mit/MesaLib/dist/src/freedreno/drm-shim/
H A Dfreedreno_noop.c120 struct drm_msm_param *gp = arg; local in function:msm_ioctl_get_param
122 switch (gp->param) {
124 gp->value = device_info->gpu_id;
127 gp->value = device_info->gmem_size;
130 gp->value = 0x100000;
133 gp->value = device_info->chip_id;
136 gp->value = 1;
139 gp->value = 1000000;
142 gp->value = 0;
145 gp
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_shader_state.c261 struct nv50_program *gp = nv50->gmtyprog; local in function:nv50_gmtyprog_validate
263 if (gp) {
264 if (!nv50_program_validate(nv50, gp))
267 PUSH_DATA (push, gp->max_gpr);
269 PUSH_DATA (push, gp->max_out);
271 PUSH_DATA (push, gp->gp.prim_type);
273 PUSH_DATA (push, gp->gp.vert_count);
275 PUSH_DATA (push, gp
598 nv50_vp_gp_mapping(uint8_t * map,int m,struct nv50_program * vp,struct nv50_program * gp) argument
634 struct nv50_program *gp = nv50->gmtyprog; local in function:nv50_gp_linkage_validate
[all...]
H A Dnv50_program.h102 } gp; member in struct:nv50_program
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_shader_state.c266 struct nv50_program *gp = nv50->gmtyprog; local in function:nv50_gmtyprog_validate
268 if (gp) {
269 if (!nv50_program_validate(nv50, gp))
272 PUSH_DATA (push, gp->max_gpr);
274 PUSH_DATA (push, gp->max_out);
276 PUSH_DATA (push, gp->gp.prim_type);
278 PUSH_DATA (push, gp->gp.vert_count);
280 PUSH_DATA (push, gp
603 nv50_vp_gp_mapping(uint8_t * map,int m,struct nv50_program * vp,struct nv50_program * gp) argument
639 struct nv50_program *gp = nv50->gmtyprog; local in function:nv50_gp_linkage_validate
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/ds/
H A Dintel_pps_perf.cc136 drm_i915_getparam_t gp = {}; local in function:pps::query_timestamp_frequency
137 gp.param = I915_PARAM_CS_TIMESTAMP_FREQUENCY;
138 gp.value = &timestamp_frequency;
139 if (perf_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0) {
/xsrc/external/mit/mesa-demos/dist/src/xdemos/
H A Dtexture_from_pixmap.c138 GLXPixmap gp; local in function:CreatePixmap
148 gp = glXCreatePixmap(dpy, config, *p, pixmapAttribs);
151 return gp;
250 BindPixmapTexture(Display *dpy, GLXPixmap gp) argument
257 glXBindTexImageEXT_func(dpy, gp, GLX_FRONT_LEFT_EXT, NULL);
369 GLXPixmap gp; local in function:main
380 gp = CreatePixmap(dpy, pixmapConfig, 512, 512, &p);
391 BindPixmapTexture(dpy, gp);
/xsrc/external/mit/MesaLib/dist/src/etnaviv/drm-shim/
H A Detnaviv_noop.c191 struct drm_etnaviv_param *gp = arg; local in function:etnaviv_ioctl_get_param
193 if (gp->param > ETNAVIV_PARAM_SOFTPIN_START_ADDR) {
194 fprintf(stderr, "Unknown DRM_IOCTL_ETNAVIV_GET_PARAM %d\n", gp->param);
198 gp->value = shim_gpu->reg_map[gp->param];
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_atom_constbuf.c158 struct st_common_program *gp = st->gp; local in function:st_update_gs_constants
160 if (gp)
161 st_upload_constants(st, &gp->Base);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nvc0/
H A Dnvc0_shader_state.c224 struct nvc0_program *gp = nvc0->gmtyprog; local in function:nvc0_gmtyprog_validate
227 if (gp && nvc0_program_validate(nvc0, gp) && gp->code_size) {
231 PUSH_DATA (push, gp->code_base);
233 PUSH_DATA (push, gp->num_gprs);
238 nvc0_program_update_context_state(nvc0, gp, 3);

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