Searched refs:si_pm4_cmd_add (Results 1 - 9 of 9) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_cp_reg_shadowing.c59 si_pm4_cmd_add(pm4, PKT3(packet, 1 + num_ranges * 2, 0));
60 si_pm4_cmd_add(pm4, gpu_address);
61 si_pm4_cmd_add(pm4, gpu_address >> 32);
63 si_pm4_cmd_add(pm4, (ranges[i].offset - offset) / 4);
64 si_pm4_cmd_add(pm4, ranges[i].size / 4);
74 si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
75 si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
79 si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
80 si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
83 si_pm4_cmd_add(pm
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H A Dsi_pm4.h61 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw);
H A Dsi_pm4.c37 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) function in typeref:typename:void
H A Dsi_state_shaders.c1658 si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
1659 si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
3539 si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0));
3540 si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
3543 si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0));
3544 si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
H A Dsi_state.c5349 si_pm4_cmd_add(pm4, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
5350 si_pm4_cmd_add(pm4, CC0_UPDATE_LOAD_ENABLES(1));
5351 si_pm4_cmd_add(pm4, CC1_UPDATE_SHADOW_ENABLES(1));
5354 si_pm4_cmd_add(pm4, PKT3(PKT3_CLEAR_STATE, 0, 0));
5355 si_pm4_cmd_add(pm4, 0);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_pm4.h69 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw);
H A Dsi_pm4.c35 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) function in typeref:typename:void
79 si_pm4_cmd_add(state, reg);
83 si_pm4_cmd_add(state, val);
H A Dsi_state.c4938 si_pm4_cmd_add(pm4, CONTEXT_CONTROL_LOAD_ENABLE(1));
4939 si_pm4_cmd_add(pm4, CONTEXT_CONTROL_SHADOW_ENABLE(1));
4944 si_pm4_cmd_add(pm4, 0);
H A Dsi_state_shaders.c2894 si_pm4_cmd_add(sctx->init_config,
2900 si_pm4_cmd_add(sctx->init_config, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));

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