Searched refs:things (Results 1 - 25 of 332) sorted by relevance

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/xsrc/external/mit/ctwm/dist/cmake_files/
H A Dmktar_support.cmake11 # how/when things get sub'd around) than it's worth, so we leave that
H A Ddtrace_support.cmake3 # By itself, dtrace can trace things like function entry/return points
40 # So we just have to hope. mk_ctf_info.sh will warn us if things
/xsrc/external/mit/MesaLib/dist/.gitlab/issue_templates/
H A DBug Report.md10 And please remove anything that doesn't apply to keep things readable :)
36 The more detail about how things are going wrong, the better.
H A DBug Report - AMD Radeon Vulkan.md10 And please remove anything that doesn't apply to keep things readable :)
19 The more detail about how things are going wrong, the better.
/xsrc/external/mit/ctwm/dist/doc/devman/
H A Dlinks.adoc12 X.org's documentation. This includes many things that are very commonly
19 * https://www.freedesktop.org/ also hosts a number of things related to
/xsrc/external/mit/xorg-server.old/dist/xfixes/
H A Dregion.c72 int things; local in function:ProcXFixesCreateRegion
79 things = (client->req_len << 2) - sizeof (xXFixesCreateRegionReq);
80 if (things & 4)
82 things >>= 3;
84 pRegion = RegionFromRects(things, (xRectangle *) (stuff + 1), CT_UNSORTED);
337 int things; local in function:ProcXFixesSetRegion
344 things = (client->req_len << 2) - sizeof (xXFixesCreateRegionReq);
345 if (things & 4)
347 things >>= 3;
349 pNew = RegionFromRects(things, (xRectangl
[all...]
/xsrc/external/mit/xorg-server/dist/xfixes/
H A Dregion.c72 int things; local in function:ProcXFixesCreateRegion
80 things = (client->req_len << 2) - sizeof(xXFixesCreateRegionReq);
81 if (things & 4)
83 things >>= 3;
85 pRegion = RegionFromRects(things, (xRectangle *) (stuff + 1), CT_UNSORTED);
320 int things; local in function:ProcXFixesSetRegion
328 things = (client->req_len << 2) - sizeof(xXFixesCreateRegionReq);
329 if (things & 4)
331 things >>= 3;
333 pNew = RegionFromRects(things, (xRectangl
[all...]
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D10.3.5.rst58 - nv50,nvc0: buffer resources can be bound as other things down the
/xsrc/external/mit/brotli/dist/
H A DCONTRIBUTING.md11 need to be sure of various other things—for instance that you'll tell us if you
/xsrc/external/mit/ctwm/dist/client/
H A DREADME.md20 A quick summary of the things in here
/xsrc/external/mit/MesaLib/dist/docs/nir/
H A Dalu.rst8 identical output. A good rule of thumb is that only things which can be
44 are things like :nir:alu-op:`vec4` or :nir:alu-op:`pack_64_2x32` where any
/xsrc/external/mit/libXaw/dist/src/
H A DList.c407 * Resets the new list when important things change.
547 /* If in right margin handle things right */
611 int things; local in function:ItemInRectangle
616 things = lw->list.nrows;
618 things = lw->list.ncols;
620 mod_item = item % things;
621 if ((mod_item >= ul % things) && (mod_item <= lr % things))
/xsrc/external/mit/xinit/dist/
H A Dstartx.cpp8 XCOMM The system xinitrc should probably do things like check for
/xsrc/external/mit/MesaLib/dist/docs/
H A Denvvars.rst243 a comma-separated list of named flags, which do various things:
510 a comma-separated list of named flags, which do various things:
584 a comma-separated list of named flags, which do various things:
613 a comma-separated list of named flags, which do various things:
699 a comma-separated list of named flags, which do various things:
729 a comma-separated list of named flags, which do various things:
755 a comma-separated list of named flags, which do various things:
850 a comma-separated list of named flags, which do various things:
948 a comma-separated list of named flags, which do various things:
H A Dinstall.rst57 if things fail.
171 here are a few things to check:
/xsrc/external/mit/xorg-server/dist/hw/xquartz/pbproxy/
H A Dmain.m60 * make things worse...
/xsrc/external/mit/MesaLib/dist/docs/drivers/
H A Dzink.rst14 The feature-level of Zink depends on two things; what's implemented in Zink,
280 In order to make things a bit easier to follow, we have decided to create our
/xsrc/external/mit/MesaLib/dist/docs/isl/
H A Dunits.rst32 block height. Since the old surface state code tries to store things in
59 the first things ISL does is to compute :cpp:member:`isl_surf::phys_level0_sa`
H A Dhiz.rst25 rendering, things are pretty straightforward: you need one HiZ surface for each
/xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/drivers/freedreno/
H A Dir3-notes.rst6 Compared to the previous generation a2xx ISA (ir2), the a3xx ISA is a "simple" scalar instruction set. However, the compiler is responsible, in most cases, to schedule the instructions. The hardware does not try to hide the shader core pipeline stages. For a common example, a common (cat2) ALU instruction takes four cycles, so a subsequent cat2 instruction which uses the result must have three intervening instructions (or nops). When operating on vec4's, typically the corresponding scalar instructions for operating on the remaining three components could typically fit. Although that results in a lot of edge cases where things fall over, like:
263 Relative addressing of the const file (for example, a uniform array) is relatively simple. We don't do register assignment of the const file, so all that is required is to schedule things properly. Ie. the instruction that writes the address register must be scheduled first, and we cannot have two different address register values live at one time.
293 The scheduling pass has some smarts to schedule things such that only a single ``a0.x`` value is used at any one time.
295 To implement variable arrays, values are stored in consecutive scalar registers. This has some overlap with `register groups`_, in that ``fanin`` and ``fanout`` are used to help group things for the `register assignment`_ pass.
396 The eventual plan is to invert that, with the front-end inserting no ``mov``\s and CP legalize things.
/xsrc/external/mit/xorg-server.old/dist/Xext/
H A DpanoramiXprocs.c1622 int result, things, i, j; local in function:PanoramiXPolyFillRectangle
1645 things = (client->req_len << 2) - sizeof(xPolyFillRectangleReq);
1646 if(things & 4) return BadLength;
1647 things >>= 3;
1648 if (things > 0){
1649 origRects = malloc(things * sizeof(xRectangle));
1650 memcpy((char*)origRects,(char*)&stuff[1], things * sizeof(xRectangle));
1653 if(j) memcpy(&stuff[1], origRects, things * sizeof(xRectangle));
1662 for (i = things; i--; rects++) {
/xsrc/external/mit/xorg-server/dist/Xext/
H A DpanoramiXprocs.c1769 int result, things, i, j; local in function:PanoramiXPolyFillRectangle
1793 things = (client->req_len << 2) - sizeof(xPolyFillRectangleReq);
1794 if (things & 4)
1796 things >>= 3;
1797 if (things > 0) {
1798 origRects = xallocarray(things, sizeof(xRectangle));
1800 things * sizeof(xRectangle));
1804 memcpy(&stuff[1], origRects, things * sizeof(xRectangle));
1813 for (i = things; i--; rects++) {
/xsrc/external/mit/MesaLib/dist/docs/drivers/freedreno/
H A Disaspec.rst21 cuts taken to get things up and running (which are mostly not inherent to
72 group things into instruction "categories":
256 in more than one instruction category. For things
H A Dir3-notes.rst6 Compared to the previous generation a2xx ISA (ir2), the a3xx ISA is a "simple" scalar instruction set. However, the compiler is responsible, in most cases, to schedule the instructions. The hardware does not try to hide the shader core pipeline stages. For a common example, a common (cat2) ALU instruction takes four cycles, so a subsequent cat2 instruction which uses the result must have three intervening instructions (or NOPs). When operating on vec4's, typically the corresponding scalar instructions for operating on the remaining three components could typically fit. Although that results in a lot of edge cases where things fall over, like:
263 Relative addressing of the const file (for example, a uniform array) is relatively simple. We don't do register assignment of the const file, so all that is required is to schedule things properly. I.e. the instruction that writes the address register must be scheduled first, and we cannot have two different address register values live at one time.
293 The scheduling pass has some smarts to schedule things such that only a single ``a0.x`` value is used at any one time.
367 The eventual plan is to invert that, with the front-end inserting no ``mov``\s and CP legalize things.
/xsrc/external/mit/xorg-server.old/dist/hw/xquartz/pbproxy/
H A Dmain.m71 * make things worse...

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