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.Dd August 15, 2004 .Dt HPC 4 sgimips .Os .Sh NAME .Nm hpc .Nd SGI High performance Peripheral Controller .Sh SYNOPSIS .Cd "hpc0 at gio0 addr 0x1fb80000 flags 0x0000" .Cd "hpc1 at gio0 addr 0x1fb00000 flags 0x0000" .Cd "hpc2 at gio0 addr 0x1fb98000 flags 0x0000" .Cd "hpc3 at gio0 addr 0x1fb90000 flags 0x0000" .Sh DESCRIPTION .Nm interfaces the peripherals connected to it to the .Xr gio 4 bus. .Nm is found on the Personal Iris 4D/3x, Indigo, Indy, and Indigo2 machines.
p There are three different numerical revisions of the .Nm controller. Revisions 1 and 1.5 exist on Personal Iris 4D/3x and Indigo machines, as well as GIO32bis expansion cards such as the E++ SEEQ-based ethernet adapter. Revision 1.5 supports biendian operation. Revision 3 exists on Indy and Indigo2 systems. It is possible to have an onboard HPC3 as well as HPC1.5-based GIO32bis adapters in the Indy.
p The .Nm driver will attempt to detect the revision present, but since this is a heuristic exercise, flags exist to force the detected revision: l -tag -compact -width "0x0000" -offset "xxxx" t 0x0001 Force HPC Revision to 1 t 0x0002 Force HPC Revision to 1.5 t 0x0003 Force HPC Revision to 3 .El .Sh HARDWARE l -tag -width dsclock -offset indent t dsclock DS1286-based RTC t dpclock DP8573A-based RTC t haltwo HAL2 audio controller t sq Seeq 8003 and 80C03 .Tn Ethernet controllers t wdsc WD33c93 .Tn SCSI controller t zsc Zilog Z8530 UART .El .Sh SEE ALSO .Xr gio 4 , .Xr imc 4 , .Xr pic 4 .Sh HISTORY The .Nm driver first appeared in .Nx 1.6 with support for Revision 3. Revision 1 and 1.5 support was added in .Nx 2.0 . .Sh BUGS .Nm Revisions 1 and 1.5 support DMA buffer pointers of only 28 bits and may therefore only address 256 megabytes of memory. The R4k Indigo and Indy are the only systems that support sufficient memory to illustrate this drawback. A software workaround is not currently implemented. Revision 3, with 32 bit pointers, does not have this limitation.