lock.h revision 1.17 
1/* $NetBSD: lock.h,v 1.17 2003/06/23 11:01:01 martin Exp $ */
2
3/*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*
41 * Machine-dependent spin lock operations.
42 */
43
44#ifndef _ALPHA_LOCK_H_
45#define	_ALPHA_LOCK_H_
46
47#include "opt_multiprocessor.h"
48
49typedef	__volatile int		__cpu_simple_lock_t;
50
51#define	__SIMPLELOCK_LOCKED	1
52#define	__SIMPLELOCK_UNLOCKED	0
53
54static __inline void
55__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
56{
57
58	__asm __volatile(
59		"# BEGIN __cpu_simple_lock_init\n"
60		"	stl	$31, %0		\n"
61		"	mb			\n"
62		"	# END __cpu_simple_lock_init"
63		: "=m" (*alp));
64}
65
66static __inline void
67__cpu_simple_lock(__cpu_simple_lock_t *alp)
68{
69	unsigned long t0;
70
71	/*
72	 * Note, if we detect that the lock is held when
73	 * we do the initial load-locked, we spin using
74	 * a non-locked load to save the coherency logic
75	 * some work.
76	 */
77
78	__asm __volatile(
79		"# BEGIN __cpu_simple_lock\n"
80		"1:	ldl_l	%0, %3		\n"
81		"	bne	%0, 2f		\n"
82		"	bis	$31, %2, %0	\n"
83		"	stl_c	%0, %1		\n"
84		"	beq	%0, 3f		\n"
85		"	mb			\n"
86		"	br	4f		\n"
87		"2:	ldl	%0, %3		\n"
88		"	beq	%0, 1b		\n"
89		"	br	2b		\n"
90		"3:	br	1b		\n"
91		"4:				\n"
92		"	# END __cpu_simple_lock\n"
93		: "=&r" (t0), "=m" (*alp)
94		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
95		: "memory");
96}
97
98static __inline int
99__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
100{
101	unsigned long t0, v0;
102
103	__asm __volatile(
104		"# BEGIN __cpu_simple_lock_try\n"
105		"1:	ldl_l	%0, %4		\n"
106		"	bne	%0, 2f		\n"
107		"	bis	$31, %3, %0	\n"
108		"	stl_c	%0, %2		\n"
109		"	beq	%0, 3f		\n"
110		"	mb			\n"
111		"	bis	$31, 1, %1	\n"
112		"	br	4f		\n"
113		"2:	bis	$31, $31, %1	\n"
114		"	br	4f		\n"
115		"3:	br	1b		\n"
116		"4:				\n"
117		"	# END __cpu_simple_lock_try"
118		: "=&r" (t0), "=r" (v0), "=m" (*alp)
119		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
120		: "memory");
121
122	return (v0 != 0);
123}
124
125static __inline void
126__cpu_simple_unlock(__cpu_simple_lock_t *alp)
127{
128
129	__asm __volatile(
130		"# BEGIN __cpu_simple_unlock\n"
131		"	mb			\n"
132		"	stl	$31, %0		\n"
133		"	# END __cpu_simple_unlock"
134		: "=m" (*alp));
135}
136
137#if defined(MULTIPROCESSOR)
138/*
139 * On the Alpha, interprocessor interrupts come in at device priority
140 * level.  This can cause some problems while waiting for r/w spinlocks
141 * from a high'ish priority level: IPIs that come in will not be processed.
142 * This can lead to deadlock.
143 *
144 * This hook allows IPIs to be processed while a spinlock's interlock
145 * is released.
146 */
147#define	SPINLOCK_SPIN_HOOK						\
148do {									\
149	struct cpu_info *__ci = curcpu();				\
150	int __s;							\
151									\
152	if (__ci->ci_ipis != 0) {					\
153		/* printf("CPU %lu has IPIs pending\n",			\
154		    __ci->ci_cpuid); */					\
155		__s = splipi();						\
156		alpha_ipi_process(__ci, NULL);				\
157		splx(__s);						\
158	}								\
159} while (0)
160#endif /* MULTIPROCESSOR */
161
162#endif /* _ALPHA_LOCK_H_ */
163