apecs.c revision 1.15 1 1.15 cgd /* $NetBSD: apecs.c,v 1.15 1996/11/25 03:56:48 cgd Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.7 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.1 cgd #include <sys/param.h>
31 1.1 cgd #include <sys/systm.h>
32 1.1 cgd #include <sys/kernel.h>
33 1.1 cgd #include <sys/malloc.h>
34 1.1 cgd #include <sys/device.h>
35 1.1 cgd #include <vm/vm.h>
36 1.1 cgd
37 1.1 cgd #include <machine/autoconf.h>
38 1.1 cgd #include <machine/rpb.h>
39 1.1 cgd
40 1.1 cgd #include <dev/isa/isareg.h>
41 1.1 cgd #include <dev/isa/isavar.h>
42 1.1 cgd
43 1.1 cgd #include <dev/pci/pcireg.h>
44 1.1 cgd #include <dev/pci/pcivar.h>
45 1.1 cgd #include <alpha/pci/apecsreg.h>
46 1.4 cgd #include <alpha/pci/apecsvar.h>
47 1.9 cgd #if defined(DEC_2100_A50)
48 1.6 cgd #include <alpha/pci/pci_2100_a50.h>
49 1.9 cgd #endif
50 1.1 cgd
51 1.1 cgd int apecsmatch __P((struct device *, void *, void *));
52 1.1 cgd void apecsattach __P((struct device *, struct device *, void *));
53 1.1 cgd
54 1.5 thorpej struct cfattach apecs_ca = {
55 1.6 cgd sizeof(struct apecs_softc), apecsmatch, apecsattach,
56 1.5 thorpej };
57 1.5 thorpej
58 1.5 thorpej struct cfdriver apecs_cd = {
59 1.6 cgd NULL, "apecs", DV_DULL,
60 1.1 cgd };
61 1.1 cgd
62 1.10 cgd static int apecsprint __P((void *, const char *pnp));
63 1.1 cgd
64 1.4 cgd /* There can be only one. */
65 1.4 cgd int apecsfound;
66 1.4 cgd struct apecs_config apecs_configuration;
67 1.1 cgd
68 1.1 cgd int
69 1.1 cgd apecsmatch(parent, match, aux)
70 1.1 cgd struct device *parent;
71 1.1 cgd void *match, *aux;
72 1.1 cgd {
73 1.4 cgd struct confargs *ca = aux;
74 1.1 cgd
75 1.4 cgd /* Make sure that we're looking for an APECS. */
76 1.5 thorpej if (strcmp(ca->ca_name, apecs_cd.cd_name) != 0)
77 1.4 cgd return (0);
78 1.4 cgd
79 1.4 cgd if (apecsfound)
80 1.4 cgd return (0);
81 1.1 cgd
82 1.1 cgd return (1);
83 1.1 cgd }
84 1.1 cgd
85 1.2 cgd /*
86 1.2 cgd * Set up the chipset's function pointers.
87 1.2 cgd */
88 1.2 cgd void
89 1.15 cgd apecs_init(acp, mallocsafe)
90 1.4 cgd struct apecs_config *acp;
91 1.15 cgd int mallocsafe;
92 1.2 cgd {
93 1.4 cgd acp->ac_comanche_pass2 =
94 1.4 cgd (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0;
95 1.4 cgd acp->ac_memwidth =
96 1.4 cgd (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64;
97 1.4 cgd acp->ac_epic_pass2 =
98 1.4 cgd (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0;
99 1.4 cgd
100 1.15 cgd acp->ac_haxr1 = REGVAL(EPIC_HAXR1);
101 1.15 cgd acp->ac_haxr2 = REGVAL(EPIC_HAXR2);
102 1.15 cgd
103 1.4 cgd /*
104 1.4 cgd * Can't set up SGMAP data here; can be called before malloc().
105 1.15 cgd * XXX THIS COMMENT NO LONGER MAKES SENSE.
106 1.4 cgd */
107 1.4 cgd
108 1.15 cgd if (!acp->ac_initted) {
109 1.15 cgd /* don't do these twice since they set up extents */
110 1.15 cgd acp->ac_iot = apecs_bus_io_init(acp);
111 1.15 cgd acp->ac_memt = apecs_bus_mem_init(acp);
112 1.15 cgd }
113 1.15 cgd acp->ac_mallocsafe = mallocsafe;
114 1.15 cgd
115 1.6 cgd apecs_pci_init(&acp->ac_pc, acp);
116 1.4 cgd
117 1.4 cgd /* Turn off DMA window enables in PCI Base Reg 1. */
118 1.4 cgd REGVAL(EPIC_PCI_BASE_1) = 0;
119 1.8 cgd alpha_mb();
120 1.2 cgd
121 1.4 cgd /* XXX SGMAP? */
122 1.13 cgd
123 1.13 cgd /* XXX XXX BEGIN XXX XXX */
124 1.13 cgd { /* XXX */
125 1.13 cgd extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */
126 1.13 cgd alpha_XXX_dmamap_or = 0x40000000; /* XXX */
127 1.13 cgd } /* XXX */
128 1.13 cgd /* XXX XXX END XXX XXX */
129 1.15 cgd
130 1.15 cgd acp->ac_initted = 1;
131 1.2 cgd }
132 1.2 cgd
133 1.1 cgd void
134 1.1 cgd apecsattach(parent, self, aux)
135 1.1 cgd struct device *parent, *self;
136 1.1 cgd void *aux;
137 1.1 cgd {
138 1.4 cgd struct apecs_softc *sc = (struct apecs_softc *)self;
139 1.4 cgd struct apecs_config *acp;
140 1.6 cgd struct pcibus_attach_args pba;
141 1.4 cgd
142 1.4 cgd /* note that we've attached the chipset; can't have 2 APECSes. */
143 1.4 cgd apecsfound = 1;
144 1.4 cgd
145 1.4 cgd /*
146 1.4 cgd * set up the chipset's info; done once at console init time
147 1.4 cgd * (maybe), but doesn't hurt to do twice.
148 1.4 cgd */
149 1.4 cgd acp = sc->sc_acp = &apecs_configuration;
150 1.15 cgd apecs_init(acp, 1);
151 1.1 cgd
152 1.4 cgd /* XXX SGMAP FOO */
153 1.1 cgd
154 1.12 christos printf(": DECchip %s Core Logic chipset\n",
155 1.4 cgd acp->ac_memwidth == 128 ? "21072" : "21071");
156 1.12 christos printf("%s: DC21071-CA pass %d, %d-bit memory bus\n",
157 1.4 cgd self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth);
158 1.12 christos printf("%s: DC21071-DA pass %d\n", self->dv_xname,
159 1.4 cgd acp->ac_epic_pass2 ? 2 : 1);
160 1.1 cgd /* XXX print bcache size */
161 1.1 cgd
162 1.4 cgd if (!acp->ac_epic_pass2)
163 1.12 christos printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n");
164 1.1 cgd
165 1.1 cgd switch (hwrpb->rpb_type) {
166 1.1 cgd #if defined(DEC_2100_A50)
167 1.1 cgd case ST_DEC_2100_A50:
168 1.6 cgd pci_2100_a50_pickintr(acp);
169 1.1 cgd break;
170 1.1 cgd #endif
171 1.14 cgd
172 1.1 cgd default:
173 1.1 cgd panic("apecsattach: shouldn't be here, really...");
174 1.1 cgd }
175 1.1 cgd
176 1.6 cgd pba.pba_busname = "pci";
177 1.13 cgd pba.pba_iot = acp->ac_iot;
178 1.13 cgd pba.pba_memt = acp->ac_memt;
179 1.6 cgd pba.pba_pc = &acp->ac_pc;
180 1.6 cgd pba.pba_bus = 0;
181 1.6 cgd config_found(self, &pba, apecsprint);
182 1.1 cgd }
183 1.1 cgd
184 1.1 cgd static int
185 1.1 cgd apecsprint(aux, pnp)
186 1.1 cgd void *aux;
187 1.10 cgd const char *pnp;
188 1.1 cgd {
189 1.15 cgd register struct pcibus_attach_args *pba = aux;
190 1.1 cgd
191 1.4 cgd /* only PCIs can attach to APECSes; easy. */
192 1.4 cgd if (pnp)
193 1.12 christos printf("%s at %s", pba->pba_busname, pnp);
194 1.12 christos printf(" bus %d", pba->pba_bus);
195 1.4 cgd return (UNCONF);
196 1.1 cgd }
197