cpu.h revision 1.29
11.29Syamt/*	$NetBSD: cpu.h,v 1.29 2007/10/18 15:28:34 yamt Exp $	*/
21.1Sfvdl
31.1Sfvdl/*-
41.1Sfvdl * Copyright (c) 1990 The Regents of the University of California.
51.1Sfvdl * All rights reserved.
61.1Sfvdl *
71.1Sfvdl * This code is derived from software contributed to Berkeley by
81.1Sfvdl * William Jolitz.
91.1Sfvdl *
101.1Sfvdl * Redistribution and use in source and binary forms, with or without
111.1Sfvdl * modification, are permitted provided that the following conditions
121.1Sfvdl * are met:
131.1Sfvdl * 1. Redistributions of source code must retain the above copyright
141.1Sfvdl *    notice, this list of conditions and the following disclaimer.
151.1Sfvdl * 2. Redistributions in binary form must reproduce the above copyright
161.1Sfvdl *    notice, this list of conditions and the following disclaimer in the
171.1Sfvdl *    documentation and/or other materials provided with the distribution.
181.2Sagc * 3. Neither the name of the University nor the names of its contributors
191.1Sfvdl *    may be used to endorse or promote products derived from this software
201.1Sfvdl *    without specific prior written permission.
211.1Sfvdl *
221.1Sfvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
231.1Sfvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
241.1Sfvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
251.1Sfvdl * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
261.1Sfvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
271.1Sfvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
281.1Sfvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
291.1Sfvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
301.1Sfvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
311.1Sfvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
321.1Sfvdl * SUCH DAMAGE.
331.1Sfvdl *
341.1Sfvdl *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
351.1Sfvdl */
361.1Sfvdl
371.1Sfvdl#ifndef _AMD64_CPU_H_
381.1Sfvdl#define _AMD64_CPU_H_
391.1Sfvdl
401.6Syamt#if defined(_KERNEL)
411.1Sfvdl#if defined(_KERNEL_OPT)
421.1Sfvdl#include "opt_multiprocessor.h"
431.1Sfvdl#include "opt_lockdebug.h"
441.1Sfvdl#endif
451.1Sfvdl
461.1Sfvdl/*
471.1Sfvdl * Definitions unique to x86-64 cpu support.
481.1Sfvdl */
491.1Sfvdl#include <machine/frame.h>
501.1Sfvdl#include <machine/segments.h>
511.1Sfvdl#include <machine/tss.h>
521.1Sfvdl#include <machine/intrdefs.h>
531.1Sfvdl#include <x86/cacheinfo.h>
541.1Sfvdl
551.1Sfvdl#include <sys/device.h>
561.17Sad#include <sys/simplelock.h>
571.4Syamt#include <sys/cpu_data.h>
581.4Syamt#include <sys/cc_microtime.h>
591.1Sfvdl
601.29Syamtstruct pmap;
611.29Syamt
621.1Sfvdlstruct cpu_info {
631.1Sfvdl	struct device *ci_dev;
641.1Sfvdl	struct cpu_info *ci_self;
651.25Sad
661.25Sad	/*
671.25Sad	 * Will be accessed by other CPUs.
681.25Sad	 */
691.1Sfvdl	struct cpu_info *ci_next;
701.1Sfvdl	struct lwp *ci_curlwp;
711.25Sad	struct pmap_cpu *ci_pmap_cpu;
721.25Sad	struct lwp *ci_fpcurlwp;
731.25Sad	int ci_fpsaving;
741.1Sfvdl	u_int ci_cpuid;
751.25Sad	int ci_cpumask;			/* (1 << CPU ID) */
761.1Sfvdl	u_int ci_apicid;
771.25Sad	struct cpu_data ci_data;	/* MI per-cpu data */
781.25Sad	struct cc_microtime_state ci_cc;/* cc_microtime state */
791.1Sfvdl
801.25Sad	/*
811.25Sad	 * Private members.
821.25Sad	 */
831.25Sad	struct evcnt ci_tlb_evcnt;	/* tlb shootdown counter */
841.29Syamt	struct pmap *ci_pmap;		/* current pmap */
851.25Sad	int ci_need_tlbwait;		/* need to wait for TLB invalidations */
861.29Syamt	int ci_want_pmapload;		/* pmap_load() is needed */
871.29Syamt	int ci_tlbstate;		/* one of TLBSTATE_ states. see below */
881.29Syamt#define	TLBSTATE_VALID	0	/* all user tlbs are valid */
891.29Syamt#define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
901.29Syamt#define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
911.1Sfvdl	u_int64_t ci_scratch;
921.1Sfvdl	struct intrsource *ci_isources[MAX_INTR_SOURCES];
931.13Sad	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
941.13Sad	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
951.13Sad
961.13Sad	/* The following must be aligned for cmpxchg8b. */
971.13Sad	struct {
981.13Sad		uint32_t	ipending;
991.13Sad		int		ilevel;
1001.13Sad	} ci_istate __aligned(8);
1011.13Sad#define ci_ipending	ci_istate.ipending
1021.13Sad#define	ci_ilevel	ci_istate.ilevel
1031.13Sad
1041.1Sfvdl	int		ci_idepth;
1051.1Sfvdl	u_int32_t	ci_imask[NIPL];
1061.1Sfvdl	u_int32_t	ci_iunmask[NIPL];
1071.1Sfvdl
1081.1Sfvdl	paddr_t 	ci_idle_pcb_paddr;
1091.1Sfvdl	u_int		ci_flags;
1101.1Sfvdl	u_int32_t	ci_ipis;
1111.1Sfvdl
1121.25Sad	int32_t		ci_cpuid_level;
1131.25Sad	uint32_t	ci_signature;
1141.25Sad	uint32_t	ci_feature_flags;
1151.19Sxtraeme	uint32_t	ci_feature2_flags;
1161.25Sad	uint32_t	ci_vendor[4];	 /* vendor string */
1171.1Sfvdl	u_int64_t	ci_tsc_freq;
1181.1Sfvdl
1191.16Sdrochner	const struct cpu_functions *ci_func;
1201.18Sxtraeme	void (*cpu_setup)(struct cpu_info *);
1211.18Sxtraeme	void (*ci_info)(struct cpu_info *);
1221.1Sfvdl
1231.1Sfvdl	int		ci_want_resched;
1241.1Sfvdl	struct trapframe *ci_ddb_regs;
1251.1Sfvdl
1261.1Sfvdl	struct x86_cache_info ci_cinfo[CAI_COUNT];
1271.1Sfvdl
1281.1Sfvdl	char		*ci_gdt;
1291.1Sfvdl
1301.1Sfvdl	struct x86_64_tss	ci_doubleflt_tss;
1311.1Sfvdl	struct x86_64_tss	ci_ddbipi_tss;
1321.1Sfvdl
1331.1Sfvdl	char *ci_doubleflt_stack;
1341.1Sfvdl	char *ci_ddbipi_stack;
1351.1Sfvdl
1361.1Sfvdl	struct evcnt ci_ipi_events[X86_NIPI];
1371.1Sfvdl};
1381.1Sfvdl
1391.1Sfvdl#define CPUF_BSP	0x0001		/* CPU is the original BSP */
1401.1Sfvdl#define CPUF_AP		0x0002		/* CPU is an AP */
1411.1Sfvdl#define CPUF_SP		0x0004		/* CPU is only processor */
1421.1Sfvdl#define CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
1431.1Sfvdl
1441.1Sfvdl#define CPUF_PRESENT	0x1000		/* CPU is present */
1451.1Sfvdl#define CPUF_RUNNING	0x2000		/* CPU is running */
1461.1Sfvdl#define CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
1471.1Sfvdl#define CPUF_GO		0x8000		/* CPU should start running */
1481.1Sfvdl
1491.1Sfvdl
1501.1Sfvdlextern struct cpu_info cpu_info_primary;
1511.1Sfvdlextern struct cpu_info *cpu_info_list;
1521.1Sfvdl
1531.1Sfvdl#define CPU_INFO_ITERATOR		int
1541.1Sfvdl#define CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
1551.1Sfvdl					ci != NULL; ci = ci->ci_next
1561.1Sfvdl
1571.1Sfvdl#define X86_MAXPROCS		32	/* bitmask; can be bumped to 64 */
1581.1Sfvdl
1591.1Sfvdl#define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
1601.1Sfvdl#define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
1611.1Sfvdl#define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
1621.1Sfvdl
1631.27Sad#if defined(__GNUC__) && defined(_KERNEL)
1641.27Sadstatic struct cpu_info *x86_curcpu(void);
1651.27Sadstatic lwp_t *x86_curlwp(void);
1661.27Sad
1671.27Sad__inline static struct cpu_info * __attribute__((__unused__))
1681.27Sadx86_curcpu(void)
1691.27Sad{
1701.27Sad	struct cpu_info *ci;
1711.27Sad
1721.27Sad	__asm volatile("movq %%gs:%1, %0" :
1731.27Sad	    "=r" (ci) :
1741.27Sad	    "m"
1751.27Sad	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self)));
1761.27Sad	return ci;
1771.27Sad}
1781.27Sad
1791.27Sad__inline static lwp_t * __attribute__((__unused__))
1801.27Sadx86_curlwp(void)
1811.27Sad{
1821.27Sad	lwp_t *l;
1831.27Sad
1841.27Sad	__asm volatile("movq %%gs:%1, %0" :
1851.27Sad	    "=r" (l) :
1861.27Sad	    "m"
1871.27Sad	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp)));
1881.27Sad	return l;
1891.27Sad}
1901.27Sad#else	/* __GNUC__ && _KERNEL */
1911.27Sad/* For non-GCC and LKMs */
1921.27Sadstruct cpu_info	*x86_curcpu(void);
1931.27Sadlwp_t	*x86_curlwp(void);
1941.27Sad#endif	/* __GNUC__ && _KERNEL */
1951.27Sad
1961.1Sfvdl#define cpu_number()	(curcpu()->ci_cpuid)
1971.1Sfvdl
1981.1Sfvdl#define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
1991.1Sfvdl
2001.1Sfvdlextern struct cpu_info *cpu_info[X86_MAXPROCS];
2011.1Sfvdl
2021.18Sxtraemevoid cpu_boot_secondary_processors(void);
2031.23Syamtvoid cpu_init_idle_lwps(void);
2041.1Sfvdl
2051.13Sad#define aston(l)	((l)->l_md.md_astpending = 1)
2061.1Sfvdl
2071.1Sfvdlextern u_int32_t cpus_attached;
2081.1Sfvdl
2091.27Sad#define curcpu()	x86_curcpu()
2101.27Sad#define curlwp		x86_curlwp()
2111.23Syamt#define curpcb		(&curlwp->l_addr->u_pcb)
2121.1Sfvdl
2131.1Sfvdl/*
2141.1Sfvdl * Arguments to hardclock, softclock and statclock
2151.1Sfvdl * encapsulate the previous machine state in an opaque
2161.1Sfvdl * clockframe; for now, use generic intrframe.
2171.1Sfvdl */
2181.7Scubestruct clockframe {
2191.7Scube	struct intrframe cf_if;
2201.7Scube};
2211.1Sfvdl
2221.7Scube#define	CLKF_USERMODE(frame)	USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_rflags)
2231.7Scube#define CLKF_PC(frame)		((frame)->cf_if.if_rip)
2241.25Sad#define CLKF_INTR(frame)	(curcpu()->ci_idepth > 0)
2251.1Sfvdl
2261.1Sfvdl/*
2271.1Sfvdl * This is used during profiling to integrate system time.  It can safely
2281.1Sfvdl * assume that the process is resident.
2291.1Sfvdl */
2301.1Sfvdl#define LWP_PC(l)		((l)->l_md.md_regs->tf_rip)
2311.1Sfvdl
2321.1Sfvdl/*
2331.1Sfvdl * Give a profiling tick to the current process when the user profiling
2341.1Sfvdl * buffer pages are invalid.  On the i386, request an ast to send us
2351.1Sfvdl * through trap(), marking the proc as needing a profiling tick.
2361.1Sfvdl */
2371.13Sadextern void cpu_need_proftick(struct lwp *);
2381.1Sfvdl
2391.1Sfvdl/*
2401.13Sad * Notify an LWP that it has a signal pending, process as soon as possible.
2411.1Sfvdl */
2421.13Sadextern void cpu_signotify(struct lwp *);
2431.1Sfvdl
2441.1Sfvdl/*
2451.1Sfvdl * We need a machine-independent name for this.
2461.1Sfvdl */
2471.18Sxtraemeextern void (*delay_func)(int);
2481.1Sfvdl
2491.1Sfvdl#define DELAY(x)		(*delay_func)(x)
2501.1Sfvdl#define delay(x)		(*delay_func)(x)
2511.1Sfvdl
2521.1Sfvdl
2531.1Sfvdl/*
2541.1Sfvdl * pull in #defines for kinds of processors
2551.1Sfvdl */
2561.1Sfvdl
2571.1Sfvdlextern int biosbasemem;
2581.1Sfvdlextern int biosextmem;
2591.1Sfvdlextern int cpu;
2601.1Sfvdlextern int cpu_feature;
2611.25Sadextern int cpu_feature2;
2621.1Sfvdlextern int cpu_id;
2631.1Sfvdlextern char cpu_vendor[];
2641.1Sfvdlextern int cpuid_level;
2651.1Sfvdl
2661.1Sfvdl/* identcpu.c */
2671.1Sfvdl
2681.18Sxtraemevoid	identifycpu(struct cpu_info *);
2691.18Sxtraemevoid cpu_probe_features(struct cpu_info *);
2701.1Sfvdl
2711.1Sfvdl/* machdep.c */
2721.18Sxtraemevoid	dumpconf(void);
2731.18Sxtraemeint	cpu_maxproc(void);
2741.18Sxtraemevoid	cpu_reset(void);
2751.18Sxtraemevoid	x86_64_proc0_tss_ldt_init(void);
2761.18Sxtraemevoid	x86_64_init_pcb_tss_ldt(struct cpu_info *);
2771.18Sxtraemevoid	cpu_proc_fork(struct proc *, struct proc *);
2781.1Sfvdl
2791.1Sfvdlstruct region_descriptor;
2801.18Sxtraemevoid	lgdt(struct region_descriptor *);
2811.18Sxtraemevoid	fillw(short, void *, size_t);
2821.1Sfvdl
2831.1Sfvdlstruct pcb;
2841.18Sxtraemevoid	savectx(struct pcb *);
2851.23Syamtvoid	lwp_trampoline(void);
2861.18Sxtraemevoid	child_trampoline(void);
2871.1Sfvdl
2881.1Sfvdl/* clock.c */
2891.18Sxtraemevoid	initrtclock(u_long);
2901.18Sxtraemevoid	startrtclock(void);
2911.18Sxtraemevoid	i8254_delay(int);
2921.18Sxtraemevoid	i8254_microtime(struct timeval *);
2931.18Sxtraemevoid	i8254_initclocks(void);
2941.1Sfvdl
2951.18Sxtraemevoid cpu_init_msrs(struct cpu_info *);
2961.1Sfvdl
2971.1Sfvdl
2981.1Sfvdl/* vm_machdep.c */
2991.18Sxtraemeint kvtop(void *);
3001.1Sfvdl
3011.1Sfvdl/* trap.c */
3021.18Sxtraemevoid	child_return(void *);
3031.1Sfvdl
3041.1Sfvdl/* consinit.c */
3051.18Sxtraemevoid kgdb_port_init(void);
3061.1Sfvdl
3071.1Sfvdl/* bus_machdep.c */
3081.18Sxtraemevoid x86_bus_space_init(void);
3091.18Sxtraemevoid x86_bus_space_mallocok(void);
3101.12Sxtraeme
3111.1Sfvdl#endif /* _KERNEL */
3121.1Sfvdl
3131.1Sfvdl#include <machine/psl.h>
3141.1Sfvdl
3151.1Sfvdl/*
3161.1Sfvdl * CTL_MACHDEP definitions.
3171.1Sfvdl */
3181.1Sfvdl#define	CPU_CONSDEV		1	/* dev_t: console terminal device */
3191.1Sfvdl#define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
3201.1Sfvdl#define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
3211.1Sfvdl#define	CPU_NKPDE		4	/* int: number of kernel PDEs */
3221.1Sfvdl#define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
3231.1Sfvdl#define CPU_DISKINFO		6	/* disk geometry information */
3241.1Sfvdl#define CPU_FPU_PRESENT		7	/* FPU is present */
3251.1Sfvdl#define	CPU_MAXID		8	/* number of valid machdep ids */
3261.1Sfvdl
3271.1Sfvdl#define	CTL_MACHDEP_NAMES { \
3281.1Sfvdl	{ 0, 0 }, \
3291.1Sfvdl	{ "console_device", CTLTYPE_STRUCT }, \
3301.1Sfvdl	{ "biosbasemem", CTLTYPE_INT }, \
3311.1Sfvdl	{ "biosextmem", CTLTYPE_INT }, \
3321.1Sfvdl	{ "nkpde", CTLTYPE_INT }, \
3331.1Sfvdl	{ "booted_kernel", CTLTYPE_STRING }, \
3341.1Sfvdl	{ "diskinfo", CTLTYPE_STRUCT }, \
3351.1Sfvdl	{ "fpu_present", CTLTYPE_INT }, \
3361.1Sfvdl}
3371.1Sfvdl
3381.1Sfvdl
3391.1Sfvdl/*
3401.1Sfvdl * Structure for CPU_DISKINFO sysctl call.
3411.1Sfvdl * XXX this should be somewhere else.
3421.1Sfvdl */
3431.1Sfvdl#define MAX_BIOSDISKS	16
3441.1Sfvdl
3451.1Sfvdlstruct disklist {
3461.1Sfvdl	int dl_nbiosdisks;			   /* number of bios disks */
3471.1Sfvdl	struct biosdisk_info {
3481.1Sfvdl		int bi_dev;			   /* BIOS device # (0x80 ..) */
3491.1Sfvdl		int bi_cyl;			   /* cylinders on disk */
3501.1Sfvdl		int bi_head;			   /* heads per track */
3511.1Sfvdl		int bi_sec;			   /* sectors per track */
3521.1Sfvdl		u_int64_t bi_lbasecs;		   /* total sec. (iff ext13) */
3531.1Sfvdl#define BIFLAG_INVALID		0x01
3541.1Sfvdl#define BIFLAG_EXTINT13		0x02
3551.1Sfvdl		int bi_flags;
3561.1Sfvdl	} dl_biosdisks[MAX_BIOSDISKS];
3571.1Sfvdl
3581.1Sfvdl	int dl_nnativedisks;			   /* number of native disks */
3591.1Sfvdl	struct nativedisk_info {
3601.1Sfvdl		char ni_devname[16];		   /* native device name */
3611.1Sfvdl		int ni_nmatches; 		   /* # of matches w/ BIOS */
3621.1Sfvdl		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
3631.1Sfvdl	} dl_nativedisks[1];			   /* actually longer */
3641.1Sfvdl};
3651.1Sfvdl
3661.1Sfvdl#endif /* !_AMD64_CPU_H_ */
367