cpu.h revision 1.42
11.42Syamt/* $NetBSD: cpu.h,v 1.42 2008/01/05 21:47:19 yamt Exp $ */ 21.1Sfvdl 31.1Sfvdl/*- 41.1Sfvdl * Copyright (c) 1990 The Regents of the University of California. 51.1Sfvdl * All rights reserved. 61.1Sfvdl * 71.1Sfvdl * This code is derived from software contributed to Berkeley by 81.1Sfvdl * William Jolitz. 91.1Sfvdl * 101.1Sfvdl * Redistribution and use in source and binary forms, with or without 111.1Sfvdl * modification, are permitted provided that the following conditions 121.1Sfvdl * are met: 131.1Sfvdl * 1. Redistributions of source code must retain the above copyright 141.1Sfvdl * notice, this list of conditions and the following disclaimer. 151.1Sfvdl * 2. Redistributions in binary form must reproduce the above copyright 161.1Sfvdl * notice, this list of conditions and the following disclaimer in the 171.1Sfvdl * documentation and/or other materials provided with the distribution. 181.2Sagc * 3. Neither the name of the University nor the names of its contributors 191.1Sfvdl * may be used to endorse or promote products derived from this software 201.1Sfvdl * without specific prior written permission. 211.1Sfvdl * 221.1Sfvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 231.1Sfvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 241.1Sfvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 251.1Sfvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 261.1Sfvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 271.1Sfvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 281.1Sfvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 291.1Sfvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 301.1Sfvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 311.1Sfvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 321.1Sfvdl * SUCH DAMAGE. 331.1Sfvdl * 341.1Sfvdl * @(#)cpu.h 5.4 (Berkeley) 5/9/91 351.1Sfvdl */ 361.1Sfvdl 371.1Sfvdl#ifndef _AMD64_CPU_H_ 381.1Sfvdl#define _AMD64_CPU_H_ 391.1Sfvdl 401.6Syamt#if defined(_KERNEL) 411.1Sfvdl#if defined(_KERNEL_OPT) 421.1Sfvdl#include "opt_multiprocessor.h" 431.1Sfvdl#include "opt_lockdebug.h" 441.33Sbouyer#include "opt_xen.h" 451.1Sfvdl#endif 461.1Sfvdl 471.1Sfvdl/* 481.1Sfvdl * Definitions unique to x86-64 cpu support. 491.1Sfvdl */ 501.1Sfvdl#include <machine/frame.h> 511.1Sfvdl#include <machine/segments.h> 521.1Sfvdl#include <machine/tss.h> 531.1Sfvdl#include <machine/intrdefs.h> 541.1Sfvdl#include <x86/cacheinfo.h> 551.1Sfvdl 561.1Sfvdl#include <sys/device.h> 571.17Sad#include <sys/simplelock.h> 581.4Syamt#include <sys/cpu_data.h> 591.4Syamt#include <sys/cc_microtime.h> 601.1Sfvdl 611.29Syamtstruct pmap; 621.29Syamt 631.1Sfvdlstruct cpu_info { 641.1Sfvdl struct device *ci_dev; 651.1Sfvdl struct cpu_info *ci_self; 661.25Sad 671.25Sad /* 681.25Sad * Will be accessed by other CPUs. 691.25Sad */ 701.1Sfvdl struct cpu_info *ci_next; 711.1Sfvdl struct lwp *ci_curlwp; 721.25Sad struct pmap_cpu *ci_pmap_cpu; 731.25Sad struct lwp *ci_fpcurlwp; 741.25Sad int ci_fpsaving; 751.1Sfvdl u_int ci_cpuid; 761.25Sad int ci_cpumask; /* (1 << CPU ID) */ 771.1Sfvdl u_int ci_apicid; 781.39Syamt uint8_t ci_initapicid; /* our intitial APIC ID */ 791.39Syamt uint8_t ci_packageid; 801.39Syamt uint8_t ci_coreid; 811.39Syamt uint8_t ci_smtid; 821.25Sad struct cpu_data ci_data; /* MI per-cpu data */ 831.25Sad struct cc_microtime_state ci_cc;/* cc_microtime state */ 841.1Sfvdl 851.25Sad /* 861.25Sad * Private members. 871.25Sad */ 881.25Sad struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 891.29Syamt struct pmap *ci_pmap; /* current pmap */ 901.25Sad int ci_need_tlbwait; /* need to wait for TLB invalidations */ 911.29Syamt int ci_want_pmapload; /* pmap_load() is needed */ 921.31Sad volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 931.29Syamt#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 941.29Syamt#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 951.29Syamt#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 961.1Sfvdl u_int64_t ci_scratch; 971.33Sbouyer#ifdef XEN 981.33Sbouyer struct iplsource *ci_isources[NIPL]; 991.33Sbouyer#else 1001.1Sfvdl struct intrsource *ci_isources[MAX_INTR_SOURCES]; 1011.33Sbouyer#endif 1021.13Sad volatile int ci_mtx_count; /* Negative count of spin mutexes */ 1031.13Sad volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 1041.13Sad 1051.13Sad /* The following must be aligned for cmpxchg8b. */ 1061.13Sad struct { 1071.13Sad uint32_t ipending; 1081.13Sad int ilevel; 1091.13Sad } ci_istate __aligned(8); 1101.13Sad#define ci_ipending ci_istate.ipending 1111.13Sad#define ci_ilevel ci_istate.ilevel 1121.13Sad 1131.1Sfvdl int ci_idepth; 1141.42Syamt void * ci_intrstack; 1151.1Sfvdl u_int32_t ci_imask[NIPL]; 1161.1Sfvdl u_int32_t ci_iunmask[NIPL]; 1171.1Sfvdl 1181.1Sfvdl u_int ci_flags; 1191.1Sfvdl u_int32_t ci_ipis; 1201.1Sfvdl 1211.25Sad int32_t ci_cpuid_level; 1221.25Sad uint32_t ci_signature; 1231.25Sad uint32_t ci_feature_flags; 1241.19Sxtraeme uint32_t ci_feature2_flags; 1251.25Sad uint32_t ci_vendor[4]; /* vendor string */ 1261.1Sfvdl u_int64_t ci_tsc_freq; 1271.34Sjoerg volatile uint32_t ci_lapic_counter; 1281.1Sfvdl 1291.16Sdrochner const struct cpu_functions *ci_func; 1301.18Sxtraeme void (*cpu_setup)(struct cpu_info *); 1311.18Sxtraeme void (*ci_info)(struct cpu_info *); 1321.1Sfvdl 1331.1Sfvdl int ci_want_resched; 1341.1Sfvdl struct trapframe *ci_ddb_regs; 1351.1Sfvdl 1361.1Sfvdl struct x86_cache_info ci_cinfo[CAI_COUNT]; 1371.1Sfvdl 1381.1Sfvdl char *ci_gdt; 1391.1Sfvdl 1401.1Sfvdl struct evcnt ci_ipi_events[X86_NIPI]; 1411.36Sjoerg 1421.42Syamt struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 1431.42Syamt int ci_tss_sel; /* TSS selector of this cpu */ 1441.42Syamt 1451.36Sjoerg /* 1461.36Sjoerg * The following two are actually region_descriptors, 1471.36Sjoerg * but that would pollute the namespace. 1481.36Sjoerg */ 1491.36Sjoerg uint64_t ci_suspend_gdt; 1501.36Sjoerg uint16_t ci_suspend_gdt_padding; 1511.36Sjoerg uint64_t ci_suspend_idt; 1521.36Sjoerg uint16_t ci_suspend_idt_padding; 1531.36Sjoerg 1541.36Sjoerg uint16_t ci_suspend_tr; 1551.36Sjoerg uint16_t ci_suspend_ldt; 1561.36Sjoerg uint32_t ci_suspend_fs_base_l; 1571.36Sjoerg uint32_t ci_suspend_fs_base_h; 1581.36Sjoerg uint32_t ci_suspend_gs_base_l; 1591.36Sjoerg uint32_t ci_suspend_gs_base_h; 1601.36Sjoerg uint32_t ci_suspend_gs_kernelbase_l; 1611.36Sjoerg uint32_t ci_suspend_gs_kernelbase_h; 1621.36Sjoerg uint32_t ci_suspend_msr_efer; 1631.36Sjoerg uint64_t ci_suspend_rbx; 1641.36Sjoerg uint64_t ci_suspend_rbp; 1651.36Sjoerg uint64_t ci_suspend_rsp; 1661.36Sjoerg uint64_t ci_suspend_r12; 1671.36Sjoerg uint64_t ci_suspend_r13; 1681.36Sjoerg uint64_t ci_suspend_r14; 1691.36Sjoerg uint64_t ci_suspend_r15; 1701.36Sjoerg uint64_t ci_suspend_rfl; 1711.36Sjoerg uint64_t ci_suspend_cr0; 1721.36Sjoerg uint64_t ci_suspend_cr2; 1731.36Sjoerg uint64_t ci_suspend_cr3; 1741.36Sjoerg uint64_t ci_suspend_cr4; 1751.36Sjoerg uint64_t ci_suspend_cr8; 1761.1Sfvdl}; 1771.1Sfvdl 1781.1Sfvdl#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 1791.1Sfvdl#define CPUF_AP 0x0002 /* CPU is an AP */ 1801.1Sfvdl#define CPUF_SP 0x0004 /* CPU is only processor */ 1811.1Sfvdl#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 1821.1Sfvdl 1831.1Sfvdl#define CPUF_PRESENT 0x1000 /* CPU is present */ 1841.1Sfvdl#define CPUF_RUNNING 0x2000 /* CPU is running */ 1851.1Sfvdl#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 1861.1Sfvdl#define CPUF_GO 0x8000 /* CPU should start running */ 1871.1Sfvdl 1881.1Sfvdl 1891.1Sfvdlextern struct cpu_info cpu_info_primary; 1901.1Sfvdlextern struct cpu_info *cpu_info_list; 1911.1Sfvdl 1921.1Sfvdl#define CPU_INFO_ITERATOR int 1931.1Sfvdl#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 1941.1Sfvdl ci != NULL; ci = ci->ci_next 1951.1Sfvdl 1961.1Sfvdl#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 1971.1Sfvdl 1981.36Sjoerg#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 1991.36Sjoerg#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 2001.36Sjoerg#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 2011.1Sfvdl 2021.27Sad#if defined(__GNUC__) && defined(_KERNEL) 2031.27Sadstatic struct cpu_info *x86_curcpu(void); 2041.27Sadstatic lwp_t *x86_curlwp(void); 2051.27Sad 2061.38Sperry__inline static struct cpu_info * __unused 2071.27Sadx86_curcpu(void) 2081.27Sad{ 2091.27Sad struct cpu_info *ci; 2101.27Sad 2111.27Sad __asm volatile("movq %%gs:%1, %0" : 2121.27Sad "=r" (ci) : 2131.27Sad "m" 2141.27Sad (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 2151.27Sad return ci; 2161.27Sad} 2171.27Sad 2181.38Sperry__inline static lwp_t * __unused 2191.27Sadx86_curlwp(void) 2201.27Sad{ 2211.27Sad lwp_t *l; 2221.27Sad 2231.27Sad __asm volatile("movq %%gs:%1, %0" : 2241.27Sad "=r" (l) : 2251.27Sad "m" 2261.27Sad (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 2271.27Sad return l; 2281.27Sad} 2291.27Sad#else /* __GNUC__ && _KERNEL */ 2301.27Sad/* For non-GCC and LKMs */ 2311.27Sadstruct cpu_info *x86_curcpu(void); 2321.27Sadlwp_t *x86_curlwp(void); 2331.27Sad#endif /* __GNUC__ && _KERNEL */ 2341.27Sad 2351.1Sfvdl#define cpu_number() (curcpu()->ci_cpuid) 2361.1Sfvdl 2371.1Sfvdl#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 2381.1Sfvdl 2391.1Sfvdlextern struct cpu_info *cpu_info[X86_MAXPROCS]; 2401.1Sfvdl 2411.18Sxtraemevoid cpu_boot_secondary_processors(void); 2421.23Syamtvoid cpu_init_idle_lwps(void); 2431.1Sfvdl 2441.13Sad#define aston(l) ((l)->l_md.md_astpending = 1) 2451.1Sfvdl 2461.1Sfvdlextern u_int32_t cpus_attached; 2471.1Sfvdl 2481.27Sad#define curcpu() x86_curcpu() 2491.27Sad#define curlwp x86_curlwp() 2501.23Syamt#define curpcb (&curlwp->l_addr->u_pcb) 2511.1Sfvdl 2521.1Sfvdl/* 2531.1Sfvdl * Arguments to hardclock, softclock and statclock 2541.1Sfvdl * encapsulate the previous machine state in an opaque 2551.1Sfvdl * clockframe; for now, use generic intrframe. 2561.1Sfvdl */ 2571.7Scubestruct clockframe { 2581.7Scube struct intrframe cf_if; 2591.7Scube}; 2601.1Sfvdl 2611.37Sdsl#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 2621.37Sdsl (frame)->cf_if.if_tf.tf_rflags) 2631.37Sdsl#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 2641.25Sad#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 2651.1Sfvdl 2661.1Sfvdl/* 2671.1Sfvdl * This is used during profiling to integrate system time. It can safely 2681.1Sfvdl * assume that the process is resident. 2691.1Sfvdl */ 2701.1Sfvdl#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 2711.1Sfvdl 2721.1Sfvdl/* 2731.1Sfvdl * Give a profiling tick to the current process when the user profiling 2741.1Sfvdl * buffer pages are invalid. On the i386, request an ast to send us 2751.1Sfvdl * through trap(), marking the proc as needing a profiling tick. 2761.1Sfvdl */ 2771.13Sadextern void cpu_need_proftick(struct lwp *); 2781.1Sfvdl 2791.1Sfvdl/* 2801.13Sad * Notify an LWP that it has a signal pending, process as soon as possible. 2811.1Sfvdl */ 2821.13Sadextern void cpu_signotify(struct lwp *); 2831.1Sfvdl 2841.1Sfvdl/* 2851.1Sfvdl * We need a machine-independent name for this. 2861.1Sfvdl */ 2871.30Sjoergextern void (*delay_func)(unsigned int); 2881.1Sfvdl 2891.1Sfvdl#define DELAY(x) (*delay_func)(x) 2901.1Sfvdl#define delay(x) (*delay_func)(x) 2911.1Sfvdl 2921.1Sfvdl 2931.1Sfvdl/* 2941.1Sfvdl * pull in #defines for kinds of processors 2951.1Sfvdl */ 2961.1Sfvdl 2971.1Sfvdlextern int biosbasemem; 2981.1Sfvdlextern int biosextmem; 2991.1Sfvdlextern int cpu; 3001.1Sfvdlextern int cpu_feature; 3011.25Sadextern int cpu_feature2; 3021.1Sfvdlextern int cpu_id; 3031.1Sfvdlextern int cpuid_level; 3041.32Sadextern char cpu_vendorname[]; 3051.1Sfvdl 3061.1Sfvdl/* identcpu.c */ 3071.1Sfvdl 3081.18Sxtraemevoid identifycpu(struct cpu_info *); 3091.18Sxtraemevoid cpu_probe_features(struct cpu_info *); 3101.1Sfvdl 3111.1Sfvdl/* machdep.c */ 3121.18Sxtraemevoid dumpconf(void); 3131.18Sxtraemeint cpu_maxproc(void); 3141.18Sxtraemevoid cpu_reset(void); 3151.18Sxtraemevoid x86_64_proc0_tss_ldt_init(void); 3161.18Sxtraemevoid x86_64_init_pcb_tss_ldt(struct cpu_info *); 3171.18Sxtraemevoid cpu_proc_fork(struct proc *, struct proc *); 3181.1Sfvdl 3191.1Sfvdlstruct region_descriptor; 3201.18Sxtraemevoid lgdt(struct region_descriptor *); 3211.33Sbouyer#ifdef XEN 3221.33Sbouyervoid lgdt_finish(void); 3231.33Sbouyer#endif 3241.18Sxtraemevoid fillw(short, void *, size_t); 3251.1Sfvdl 3261.1Sfvdlstruct pcb; 3271.18Sxtraemevoid savectx(struct pcb *); 3281.23Syamtvoid lwp_trampoline(void); 3291.18Sxtraemevoid child_trampoline(void); 3301.1Sfvdl 3311.33Sbouyer#ifdef XEN 3321.33Sbouyervoid startrtclock(void); 3331.33Sbouyervoid xen_delay(unsigned int); 3341.33Sbouyervoid xen_initclocks(void); 3351.33Sbouyer#else 3361.1Sfvdl/* clock.c */ 3371.18Sxtraemevoid initrtclock(u_long); 3381.18Sxtraemevoid startrtclock(void); 3391.30Sjoergvoid i8254_delay(unsigned int); 3401.18Sxtraemevoid i8254_microtime(struct timeval *); 3411.18Sxtraemevoid i8254_initclocks(void); 3421.33Sbouyer#endif 3431.1Sfvdl 3441.35Sjmcneillvoid cpu_init_msrs(struct cpu_info *, bool); 3451.1Sfvdl 3461.1Sfvdl 3471.1Sfvdl/* vm_machdep.c */ 3481.18Sxtraemeint kvtop(void *); 3491.1Sfvdl 3501.1Sfvdl/* trap.c */ 3511.18Sxtraemevoid child_return(void *); 3521.1Sfvdl 3531.1Sfvdl/* consinit.c */ 3541.18Sxtraemevoid kgdb_port_init(void); 3551.1Sfvdl 3561.1Sfvdl/* bus_machdep.c */ 3571.18Sxtraemevoid x86_bus_space_init(void); 3581.18Sxtraemevoid x86_bus_space_mallocok(void); 3591.12Sxtraeme 3601.1Sfvdl#endif /* _KERNEL */ 3611.1Sfvdl 3621.1Sfvdl#include <machine/psl.h> 3631.1Sfvdl 3641.1Sfvdl/* 3651.1Sfvdl * CTL_MACHDEP definitions. 3661.1Sfvdl */ 3671.1Sfvdl#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 3681.1Sfvdl#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 3691.1Sfvdl#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 3701.1Sfvdl#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 3711.1Sfvdl#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 3721.1Sfvdl#define CPU_DISKINFO 6 /* disk geometry information */ 3731.1Sfvdl#define CPU_FPU_PRESENT 7 /* FPU is present */ 3741.1Sfvdl#define CPU_MAXID 8 /* number of valid machdep ids */ 3751.1Sfvdl 3761.1Sfvdl#define CTL_MACHDEP_NAMES { \ 3771.1Sfvdl { 0, 0 }, \ 3781.1Sfvdl { "console_device", CTLTYPE_STRUCT }, \ 3791.1Sfvdl { "biosbasemem", CTLTYPE_INT }, \ 3801.1Sfvdl { "biosextmem", CTLTYPE_INT }, \ 3811.1Sfvdl { "nkpde", CTLTYPE_INT }, \ 3821.1Sfvdl { "booted_kernel", CTLTYPE_STRING }, \ 3831.1Sfvdl { "diskinfo", CTLTYPE_STRUCT }, \ 3841.1Sfvdl { "fpu_present", CTLTYPE_INT }, \ 3851.1Sfvdl} 3861.1Sfvdl 3871.1Sfvdl 3881.1Sfvdl/* 3891.1Sfvdl * Structure for CPU_DISKINFO sysctl call. 3901.1Sfvdl * XXX this should be somewhere else. 3911.1Sfvdl */ 3921.1Sfvdl#define MAX_BIOSDISKS 16 3931.1Sfvdl 3941.1Sfvdlstruct disklist { 3951.1Sfvdl int dl_nbiosdisks; /* number of bios disks */ 3961.1Sfvdl struct biosdisk_info { 3971.1Sfvdl int bi_dev; /* BIOS device # (0x80 ..) */ 3981.1Sfvdl int bi_cyl; /* cylinders on disk */ 3991.1Sfvdl int bi_head; /* heads per track */ 4001.1Sfvdl int bi_sec; /* sectors per track */ 4011.1Sfvdl u_int64_t bi_lbasecs; /* total sec. (iff ext13) */ 4021.1Sfvdl#define BIFLAG_INVALID 0x01 4031.1Sfvdl#define BIFLAG_EXTINT13 0x02 4041.1Sfvdl int bi_flags; 4051.1Sfvdl } dl_biosdisks[MAX_BIOSDISKS]; 4061.1Sfvdl 4071.1Sfvdl int dl_nnativedisks; /* number of native disks */ 4081.1Sfvdl struct nativedisk_info { 4091.1Sfvdl char ni_devname[16]; /* native device name */ 4101.1Sfvdl int ni_nmatches; /* # of matches w/ BIOS */ 4111.1Sfvdl int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 4121.1Sfvdl } dl_nativedisks[1]; /* actually longer */ 4131.1Sfvdl}; 4141.1Sfvdl 4151.1Sfvdl#endif /* !_AMD64_CPU_H_ */ 416