cpu.h revision 1.50
11.50Sad/* $NetBSD: cpu.h,v 1.50 2008/04/28 22:47:37 ad Exp $ */ 21.1Sfvdl 31.1Sfvdl/*- 41.1Sfvdl * Copyright (c) 1990 The Regents of the University of California. 51.1Sfvdl * All rights reserved. 61.1Sfvdl * 71.1Sfvdl * This code is derived from software contributed to Berkeley by 81.1Sfvdl * William Jolitz. 91.1Sfvdl * 101.1Sfvdl * Redistribution and use in source and binary forms, with or without 111.1Sfvdl * modification, are permitted provided that the following conditions 121.1Sfvdl * are met: 131.1Sfvdl * 1. Redistributions of source code must retain the above copyright 141.1Sfvdl * notice, this list of conditions and the following disclaimer. 151.1Sfvdl * 2. Redistributions in binary form must reproduce the above copyright 161.1Sfvdl * notice, this list of conditions and the following disclaimer in the 171.1Sfvdl * documentation and/or other materials provided with the distribution. 181.2Sagc * 3. Neither the name of the University nor the names of its contributors 191.1Sfvdl * may be used to endorse or promote products derived from this software 201.1Sfvdl * without specific prior written permission. 211.1Sfvdl * 221.1Sfvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 231.1Sfvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 241.1Sfvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 251.1Sfvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 261.1Sfvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 271.1Sfvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 281.1Sfvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 291.1Sfvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 301.1Sfvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 311.1Sfvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 321.1Sfvdl * SUCH DAMAGE. 331.1Sfvdl * 341.1Sfvdl * @(#)cpu.h 5.4 (Berkeley) 5/9/91 351.1Sfvdl */ 361.1Sfvdl 371.1Sfvdl#ifndef _AMD64_CPU_H_ 381.1Sfvdl#define _AMD64_CPU_H_ 391.1Sfvdl 401.6Syamt#if defined(_KERNEL) 411.1Sfvdl#if defined(_KERNEL_OPT) 421.1Sfvdl#include "opt_multiprocessor.h" 431.1Sfvdl#include "opt_lockdebug.h" 441.33Sbouyer#include "opt_xen.h" 451.1Sfvdl#endif 461.1Sfvdl 471.1Sfvdl/* 481.1Sfvdl * Definitions unique to x86-64 cpu support. 491.1Sfvdl */ 501.1Sfvdl#include <machine/frame.h> 511.1Sfvdl#include <machine/segments.h> 521.1Sfvdl#include <machine/tss.h> 531.1Sfvdl#include <machine/intrdefs.h> 541.1Sfvdl#include <x86/cacheinfo.h> 551.1Sfvdl 561.1Sfvdl#include <sys/device.h> 571.17Sad#include <sys/simplelock.h> 581.4Syamt#include <sys/cpu_data.h> 591.4Syamt#include <sys/cc_microtime.h> 601.48She#include <sys/systm.h> 611.1Sfvdl 621.29Syamtstruct pmap; 631.29Syamt 641.1Sfvdlstruct cpu_info { 651.1Sfvdl struct device *ci_dev; 661.1Sfvdl struct cpu_info *ci_self; 671.25Sad 681.47Scegger#ifdef XEN 691.47Scegger volatile struct vcpu_info *ci_vcpu; 701.47Scegger#endif 711.47Scegger 721.25Sad /* 731.25Sad * Will be accessed by other CPUs. 741.25Sad */ 751.1Sfvdl struct cpu_info *ci_next; 761.1Sfvdl struct lwp *ci_curlwp; 771.25Sad struct pmap_cpu *ci_pmap_cpu; 781.25Sad struct lwp *ci_fpcurlwp; 791.25Sad int ci_fpsaving; 801.1Sfvdl u_int ci_cpuid; 811.25Sad int ci_cpumask; /* (1 << CPU ID) */ 821.1Sfvdl u_int ci_apicid; 831.39Syamt uint8_t ci_initapicid; /* our intitial APIC ID */ 841.39Syamt uint8_t ci_packageid; 851.39Syamt uint8_t ci_coreid; 861.39Syamt uint8_t ci_smtid; 871.25Sad struct cpu_data ci_data; /* MI per-cpu data */ 881.1Sfvdl 891.25Sad /* 901.25Sad * Private members. 911.25Sad */ 921.49Sad struct cc_microtime_state ci_cc __aligned(64);/* cc_microtime state */ 931.25Sad struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 941.29Syamt struct pmap *ci_pmap; /* current pmap */ 951.25Sad int ci_need_tlbwait; /* need to wait for TLB invalidations */ 961.29Syamt int ci_want_pmapload; /* pmap_load() is needed */ 971.31Sad volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 981.29Syamt#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 991.29Syamt#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 1001.29Syamt#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 1011.46Scegger uint64_t ci_scratch; 1021.33Sbouyer#ifdef XEN 1031.33Sbouyer struct iplsource *ci_isources[NIPL]; 1041.33Sbouyer#else 1051.1Sfvdl struct intrsource *ci_isources[MAX_INTR_SOURCES]; 1061.33Sbouyer#endif 1071.13Sad volatile int ci_mtx_count; /* Negative count of spin mutexes */ 1081.13Sad volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 1091.13Sad 1101.13Sad /* The following must be aligned for cmpxchg8b. */ 1111.13Sad struct { 1121.13Sad uint32_t ipending; 1131.13Sad int ilevel; 1141.13Sad } ci_istate __aligned(8); 1151.13Sad#define ci_ipending ci_istate.ipending 1161.13Sad#define ci_ilevel ci_istate.ilevel 1171.13Sad 1181.1Sfvdl int ci_idepth; 1191.42Syamt void * ci_intrstack; 1201.46Scegger uint32_t ci_imask[NIPL]; 1211.46Scegger uint32_t ci_iunmask[NIPL]; 1221.1Sfvdl 1231.1Sfvdl u_int ci_flags; 1241.46Scegger uint32_t ci_ipis; 1251.1Sfvdl 1261.25Sad int32_t ci_cpuid_level; 1271.25Sad uint32_t ci_signature; 1281.25Sad uint32_t ci_feature_flags; 1291.19Sxtraeme uint32_t ci_feature2_flags; 1301.25Sad uint32_t ci_vendor[4]; /* vendor string */ 1311.46Scegger uint64_t ci_tsc_freq; 1321.34Sjoerg volatile uint32_t ci_lapic_counter; 1331.1Sfvdl 1341.16Sdrochner const struct cpu_functions *ci_func; 1351.18Sxtraeme void (*cpu_setup)(struct cpu_info *); 1361.18Sxtraeme void (*ci_info)(struct cpu_info *); 1371.1Sfvdl 1381.1Sfvdl struct trapframe *ci_ddb_regs; 1391.1Sfvdl 1401.1Sfvdl struct x86_cache_info ci_cinfo[CAI_COUNT]; 1411.1Sfvdl 1421.1Sfvdl char *ci_gdt; 1431.1Sfvdl 1441.1Sfvdl struct evcnt ci_ipi_events[X86_NIPI]; 1451.36Sjoerg 1461.42Syamt struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 1471.42Syamt int ci_tss_sel; /* TSS selector of this cpu */ 1481.42Syamt 1491.36Sjoerg /* 1501.36Sjoerg * The following two are actually region_descriptors, 1511.36Sjoerg * but that would pollute the namespace. 1521.36Sjoerg */ 1531.36Sjoerg uint64_t ci_suspend_gdt; 1541.36Sjoerg uint16_t ci_suspend_gdt_padding; 1551.36Sjoerg uint64_t ci_suspend_idt; 1561.36Sjoerg uint16_t ci_suspend_idt_padding; 1571.36Sjoerg 1581.36Sjoerg uint16_t ci_suspend_tr; 1591.36Sjoerg uint16_t ci_suspend_ldt; 1601.36Sjoerg uint32_t ci_suspend_fs_base_l; 1611.36Sjoerg uint32_t ci_suspend_fs_base_h; 1621.36Sjoerg uint32_t ci_suspend_gs_base_l; 1631.36Sjoerg uint32_t ci_suspend_gs_base_h; 1641.36Sjoerg uint32_t ci_suspend_gs_kernelbase_l; 1651.36Sjoerg uint32_t ci_suspend_gs_kernelbase_h; 1661.36Sjoerg uint32_t ci_suspend_msr_efer; 1671.36Sjoerg uint64_t ci_suspend_rbx; 1681.36Sjoerg uint64_t ci_suspend_rbp; 1691.36Sjoerg uint64_t ci_suspend_rsp; 1701.36Sjoerg uint64_t ci_suspend_r12; 1711.36Sjoerg uint64_t ci_suspend_r13; 1721.36Sjoerg uint64_t ci_suspend_r14; 1731.36Sjoerg uint64_t ci_suspend_r15; 1741.36Sjoerg uint64_t ci_suspend_rfl; 1751.36Sjoerg uint64_t ci_suspend_cr0; 1761.36Sjoerg uint64_t ci_suspend_cr2; 1771.36Sjoerg uint64_t ci_suspend_cr3; 1781.36Sjoerg uint64_t ci_suspend_cr4; 1791.36Sjoerg uint64_t ci_suspend_cr8; 1801.49Sad 1811.49Sad /* The following must be in a single cache line. */ 1821.49Sad int ci_want_resched __aligned(64); 1831.49Sad int ci_padout __aligned(64); 1841.1Sfvdl}; 1851.1Sfvdl 1861.1Sfvdl#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 1871.1Sfvdl#define CPUF_AP 0x0002 /* CPU is an AP */ 1881.1Sfvdl#define CPUF_SP 0x0004 /* CPU is only processor */ 1891.1Sfvdl#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 1901.1Sfvdl 1911.1Sfvdl#define CPUF_PRESENT 0x1000 /* CPU is present */ 1921.1Sfvdl#define CPUF_RUNNING 0x2000 /* CPU is running */ 1931.1Sfvdl#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 1941.1Sfvdl#define CPUF_GO 0x8000 /* CPU should start running */ 1951.1Sfvdl 1961.1Sfvdl 1971.1Sfvdlextern struct cpu_info cpu_info_primary; 1981.1Sfvdlextern struct cpu_info *cpu_info_list; 1991.1Sfvdl 2001.1Sfvdl#define CPU_INFO_ITERATOR int 2011.1Sfvdl#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 2021.1Sfvdl ci != NULL; ci = ci->ci_next 2031.1Sfvdl 2041.1Sfvdl#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 2051.1Sfvdl 2061.36Sjoerg#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 2071.36Sjoerg#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 2081.36Sjoerg#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 2091.1Sfvdl 2101.50Sad#if defined(__GNUC__) && !defined(_LKM) 2111.27Sadstatic struct cpu_info *x86_curcpu(void); 2121.27Sadstatic lwp_t *x86_curlwp(void); 2131.27Sad 2141.38Sperry__inline static struct cpu_info * __unused 2151.27Sadx86_curcpu(void) 2161.27Sad{ 2171.27Sad struct cpu_info *ci; 2181.27Sad 2191.27Sad __asm volatile("movq %%gs:%1, %0" : 2201.27Sad "=r" (ci) : 2211.27Sad "m" 2221.27Sad (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 2231.27Sad return ci; 2241.27Sad} 2251.27Sad 2261.38Sperry__inline static lwp_t * __unused 2271.27Sadx86_curlwp(void) 2281.27Sad{ 2291.27Sad lwp_t *l; 2301.27Sad 2311.27Sad __asm volatile("movq %%gs:%1, %0" : 2321.27Sad "=r" (l) : 2331.27Sad "m" 2341.27Sad (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 2351.27Sad return l; 2361.27Sad} 2371.50Sad 2381.50Sad__inline static void __unused 2391.50Sadcpu_set_curpri(int pri) 2401.50Sad{ 2411.50Sad 2421.50Sad __asm volatile( 2431.50Sad "movl %1, %%gs:%0" : 2441.50Sad "=m" (*(struct cpu_info *)offsetof(struct cpu_info, ci_schedstate.spc_curpriority)) : 2451.50Sad "r" (pri) 2461.50Sad ); 2471.50Sad} 2481.50Sad#else /* __GNUC__ && !_LKM */ 2491.27Sad/* For non-GCC and LKMs */ 2501.27Sadstruct cpu_info *x86_curcpu(void); 2511.27Sadlwp_t *x86_curlwp(void); 2521.50Sadvoid cpu_set_curpri(int); 2531.50Sad#endif /* __GNUC__ && !_LKM */ 2541.27Sad 2551.1Sfvdl#define cpu_number() (curcpu()->ci_cpuid) 2561.1Sfvdl 2571.1Sfvdl#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 2581.1Sfvdl 2591.1Sfvdlextern struct cpu_info *cpu_info[X86_MAXPROCS]; 2601.1Sfvdl 2611.18Sxtraemevoid cpu_boot_secondary_processors(void); 2621.23Syamtvoid cpu_init_idle_lwps(void); 2631.1Sfvdl 2641.13Sad#define aston(l) ((l)->l_md.md_astpending = 1) 2651.1Sfvdl 2661.46Sceggerextern uint32_t cpus_attached; 2671.1Sfvdl 2681.27Sad#define curcpu() x86_curcpu() 2691.27Sad#define curlwp x86_curlwp() 2701.23Syamt#define curpcb (&curlwp->l_addr->u_pcb) 2711.1Sfvdl 2721.1Sfvdl/* 2731.1Sfvdl * Arguments to hardclock, softclock and statclock 2741.1Sfvdl * encapsulate the previous machine state in an opaque 2751.1Sfvdl * clockframe; for now, use generic intrframe. 2761.1Sfvdl */ 2771.7Scubestruct clockframe { 2781.7Scube struct intrframe cf_if; 2791.7Scube}; 2801.1Sfvdl 2811.37Sdsl#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 2821.37Sdsl (frame)->cf_if.if_tf.tf_rflags) 2831.37Sdsl#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 2841.25Sad#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 2851.1Sfvdl 2861.1Sfvdl/* 2871.1Sfvdl * This is used during profiling to integrate system time. It can safely 2881.1Sfvdl * assume that the process is resident. 2891.1Sfvdl */ 2901.1Sfvdl#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 2911.1Sfvdl 2921.1Sfvdl/* 2931.1Sfvdl * Give a profiling tick to the current process when the user profiling 2941.1Sfvdl * buffer pages are invalid. On the i386, request an ast to send us 2951.1Sfvdl * through trap(), marking the proc as needing a profiling tick. 2961.1Sfvdl */ 2971.13Sadextern void cpu_need_proftick(struct lwp *); 2981.1Sfvdl 2991.1Sfvdl/* 3001.13Sad * Notify an LWP that it has a signal pending, process as soon as possible. 3011.1Sfvdl */ 3021.13Sadextern void cpu_signotify(struct lwp *); 3031.1Sfvdl 3041.1Sfvdl/* 3051.1Sfvdl * We need a machine-independent name for this. 3061.1Sfvdl */ 3071.30Sjoergextern void (*delay_func)(unsigned int); 3081.1Sfvdl 3091.1Sfvdl#define DELAY(x) (*delay_func)(x) 3101.1Sfvdl#define delay(x) (*delay_func)(x) 3111.1Sfvdl 3121.1Sfvdl 3131.1Sfvdl/* 3141.1Sfvdl * pull in #defines for kinds of processors 3151.1Sfvdl */ 3161.1Sfvdl 3171.1Sfvdlextern int biosbasemem; 3181.1Sfvdlextern int biosextmem; 3191.1Sfvdlextern int cpu; 3201.1Sfvdlextern int cpu_feature; 3211.25Sadextern int cpu_feature2; 3221.1Sfvdlextern int cpu_id; 3231.1Sfvdlextern int cpuid_level; 3241.32Sadextern char cpu_vendorname[]; 3251.1Sfvdl 3261.1Sfvdl/* identcpu.c */ 3271.1Sfvdl 3281.18Sxtraemevoid identifycpu(struct cpu_info *); 3291.18Sxtraemevoid cpu_probe_features(struct cpu_info *); 3301.1Sfvdl 3311.1Sfvdl/* machdep.c */ 3321.18Sxtraemevoid dumpconf(void); 3331.18Sxtraemevoid cpu_reset(void); 3341.18Sxtraemevoid x86_64_proc0_tss_ldt_init(void); 3351.18Sxtraemevoid x86_64_init_pcb_tss_ldt(struct cpu_info *); 3361.18Sxtraemevoid cpu_proc_fork(struct proc *, struct proc *); 3371.1Sfvdl 3381.1Sfvdlstruct region_descriptor; 3391.18Sxtraemevoid lgdt(struct region_descriptor *); 3401.33Sbouyer#ifdef XEN 3411.33Sbouyervoid lgdt_finish(void); 3421.33Sbouyer#endif 3431.18Sxtraemevoid fillw(short, void *, size_t); 3441.1Sfvdl 3451.1Sfvdlstruct pcb; 3461.18Sxtraemevoid savectx(struct pcb *); 3471.23Syamtvoid lwp_trampoline(void); 3481.18Sxtraemevoid child_trampoline(void); 3491.1Sfvdl 3501.33Sbouyer#ifdef XEN 3511.33Sbouyervoid startrtclock(void); 3521.33Sbouyervoid xen_delay(unsigned int); 3531.33Sbouyervoid xen_initclocks(void); 3541.33Sbouyer#else 3551.1Sfvdl/* clock.c */ 3561.18Sxtraemevoid initrtclock(u_long); 3571.18Sxtraemevoid startrtclock(void); 3581.30Sjoergvoid i8254_delay(unsigned int); 3591.18Sxtraemevoid i8254_initclocks(void); 3601.33Sbouyer#endif 3611.1Sfvdl 3621.35Sjmcneillvoid cpu_init_msrs(struct cpu_info *, bool); 3631.1Sfvdl 3641.1Sfvdl 3651.1Sfvdl/* vm_machdep.c */ 3661.18Sxtraemeint kvtop(void *); 3671.1Sfvdl 3681.1Sfvdl/* trap.c */ 3691.18Sxtraemevoid child_return(void *); 3701.1Sfvdl 3711.1Sfvdl/* consinit.c */ 3721.18Sxtraemevoid kgdb_port_init(void); 3731.1Sfvdl 3741.1Sfvdl/* bus_machdep.c */ 3751.18Sxtraemevoid x86_bus_space_init(void); 3761.18Sxtraemevoid x86_bus_space_mallocok(void); 3771.12Sxtraeme 3781.1Sfvdl#endif /* _KERNEL */ 3791.1Sfvdl 3801.1Sfvdl#include <machine/psl.h> 3811.1Sfvdl 3821.1Sfvdl/* 3831.1Sfvdl * CTL_MACHDEP definitions. 3841.1Sfvdl */ 3851.1Sfvdl#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 3861.1Sfvdl#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 3871.1Sfvdl#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 3881.1Sfvdl#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 3891.1Sfvdl#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 3901.1Sfvdl#define CPU_DISKINFO 6 /* disk geometry information */ 3911.1Sfvdl#define CPU_FPU_PRESENT 7 /* FPU is present */ 3921.1Sfvdl#define CPU_MAXID 8 /* number of valid machdep ids */ 3931.1Sfvdl 3941.1Sfvdl 3951.1Sfvdl/* 3961.1Sfvdl * Structure for CPU_DISKINFO sysctl call. 3971.1Sfvdl * XXX this should be somewhere else. 3981.1Sfvdl */ 3991.1Sfvdl#define MAX_BIOSDISKS 16 4001.1Sfvdl 4011.1Sfvdlstruct disklist { 4021.1Sfvdl int dl_nbiosdisks; /* number of bios disks */ 4031.1Sfvdl struct biosdisk_info { 4041.1Sfvdl int bi_dev; /* BIOS device # (0x80 ..) */ 4051.1Sfvdl int bi_cyl; /* cylinders on disk */ 4061.1Sfvdl int bi_head; /* heads per track */ 4071.1Sfvdl int bi_sec; /* sectors per track */ 4081.46Scegger uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 4091.1Sfvdl#define BIFLAG_INVALID 0x01 4101.1Sfvdl#define BIFLAG_EXTINT13 0x02 4111.1Sfvdl int bi_flags; 4121.1Sfvdl } dl_biosdisks[MAX_BIOSDISKS]; 4131.1Sfvdl 4141.1Sfvdl int dl_nnativedisks; /* number of native disks */ 4151.1Sfvdl struct nativedisk_info { 4161.1Sfvdl char ni_devname[16]; /* native device name */ 4171.1Sfvdl int ni_nmatches; /* # of matches w/ BIOS */ 4181.1Sfvdl int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 4191.1Sfvdl } dl_nativedisks[1]; /* actually longer */ 4201.1Sfvdl}; 4211.1Sfvdl 4221.1Sfvdl#endif /* !_AMD64_CPU_H_ */ 423