cpu.h revision 1.53
1/* $NetBSD: cpu.h,v 1.53 2008/05/10 16:12:32 ad Exp $ */ 2 3/*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37#ifndef _AMD64_CPU_H_ 38#define _AMD64_CPU_H_ 39 40#if defined(_KERNEL) 41#if defined(_KERNEL_OPT) 42#include "opt_multiprocessor.h" 43#include "opt_lockdebug.h" 44#include "opt_xen.h" 45#endif 46 47/* 48 * Definitions unique to x86-64 cpu support. 49 */ 50#include <machine/frame.h> 51#include <machine/segments.h> 52#include <machine/tss.h> 53#include <machine/intrdefs.h> 54#include <x86/cacheinfo.h> 55 56#include <sys/device.h> 57#include <sys/simplelock.h> 58#include <sys/cpu_data.h> 59#include <sys/systm.h> 60 61struct pmap; 62 63struct cpu_info { 64 struct device *ci_dev; 65 struct cpu_info *ci_self; 66 67#ifdef XEN 68 volatile struct vcpu_info *ci_vcpu; 69#endif 70 71 /* 72 * Will be accessed by other CPUs. 73 */ 74 struct cpu_info *ci_next; 75 struct lwp *ci_curlwp; 76 struct pmap_cpu *ci_pmap_cpu; 77 struct lwp *ci_fpcurlwp; 78 int ci_fpsaving; 79 u_int ci_cpuid; 80 int ci_cpumask; /* (1 << CPU ID) */ 81 u_int ci_apicid; 82 uint8_t ci_initapicid; /* our intitial APIC ID */ 83 uint8_t ci_packageid; 84 uint8_t ci_coreid; 85 uint8_t ci_smtid; 86 struct cpu_data ci_data; /* MI per-cpu data */ 87 88 /* 89 * Private members. 90 */ 91 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 92 struct pmap *ci_pmap; /* current pmap */ 93 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 94 int ci_want_pmapload; /* pmap_load() is needed */ 95 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 96#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 97#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 98#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 99 uint64_t ci_scratch; 100#ifdef XEN 101 struct iplsource *ci_isources[NIPL]; 102#else 103 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 104#endif 105 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 106 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 107 108 /* The following must be aligned for cmpxchg8b. */ 109 struct { 110 uint32_t ipending; 111 int ilevel; 112 } ci_istate __aligned(8); 113#define ci_ipending ci_istate.ipending 114#define ci_ilevel ci_istate.ilevel 115 116 int ci_idepth; 117 void * ci_intrstack; 118 uint32_t ci_imask[NIPL]; 119 uint32_t ci_iunmask[NIPL]; 120 121 u_int ci_flags; 122 uint32_t ci_ipis; 123 124 int32_t ci_cpuid_level; 125 uint32_t ci_signature; 126 uint32_t ci_feature_flags; 127 uint32_t ci_feature2_flags; 128 uint32_t ci_feature3_flags; 129 uint32_t ci_padlock_flags; 130 uint32_t ci_brand_id; 131 uint32_t ci_cflush_lsize; 132 uint32_t ci_vendor[4]; /* vendor string */ 133 volatile uint32_t ci_lapic_counter; 134 135 const struct cpu_functions *ci_func; 136 void (*cpu_setup)(struct cpu_info *); 137 void (*ci_info)(struct cpu_info *); 138 139 struct trapframe *ci_ddb_regs; 140 141 struct x86_cache_info ci_cinfo[CAI_COUNT]; 142 143 char *ci_gdt; 144 145 struct evcnt ci_ipi_events[X86_NIPI]; 146 147 struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 148 int ci_tss_sel; /* TSS selector of this cpu */ 149 150 /* 151 * The following two are actually region_descriptors, 152 * but that would pollute the namespace. 153 */ 154 uint64_t ci_suspend_gdt; 155 uint16_t ci_suspend_gdt_padding; 156 uint64_t ci_suspend_idt; 157 uint16_t ci_suspend_idt_padding; 158 159 uint16_t ci_suspend_tr; 160 uint16_t ci_suspend_ldt; 161 uint32_t ci_suspend_fs_base_l; 162 uint32_t ci_suspend_fs_base_h; 163 uint32_t ci_suspend_gs_base_l; 164 uint32_t ci_suspend_gs_base_h; 165 uint32_t ci_suspend_gs_kernelbase_l; 166 uint32_t ci_suspend_gs_kernelbase_h; 167 uint32_t ci_suspend_msr_efer; 168 uint64_t ci_suspend_rbx; 169 uint64_t ci_suspend_rbp; 170 uint64_t ci_suspend_rsp; 171 uint64_t ci_suspend_r12; 172 uint64_t ci_suspend_r13; 173 uint64_t ci_suspend_r14; 174 uint64_t ci_suspend_r15; 175 uint64_t ci_suspend_rfl; 176 uint64_t ci_suspend_cr0; 177 uint64_t ci_suspend_cr2; 178 uint64_t ci_suspend_cr3; 179 uint64_t ci_suspend_cr4; 180 uint64_t ci_suspend_cr8; 181 182 /* The following must be in a single cache line. */ 183 int ci_want_resched __aligned(64); 184 int ci_padout __aligned(64); 185}; 186 187#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 188#define CPUF_AP 0x0002 /* CPU is an AP */ 189#define CPUF_SP 0x0004 /* CPU is only processor */ 190#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 191 192#define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 193#define CPUF_PRESENT 0x1000 /* CPU is present */ 194#define CPUF_RUNNING 0x2000 /* CPU is running */ 195#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 196#define CPUF_GO 0x8000 /* CPU should start running */ 197 198 199extern struct cpu_info cpu_info_primary; 200extern struct cpu_info *cpu_info_list; 201 202#define CPU_INFO_ITERATOR int 203#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 204 ci != NULL; ci = ci->ci_next 205 206#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 207 208#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 209#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 210#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 211 212#if defined(__GNUC__) && !defined(_LKM) 213static struct cpu_info *x86_curcpu(void); 214static lwp_t *x86_curlwp(void); 215 216__inline static struct cpu_info * __unused 217x86_curcpu(void) 218{ 219 struct cpu_info *ci; 220 221 __asm volatile("movq %%gs:%1, %0" : 222 "=r" (ci) : 223 "m" 224 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 225 return ci; 226} 227 228__inline static lwp_t * __unused 229x86_curlwp(void) 230{ 231 lwp_t *l; 232 233 __asm volatile("movq %%gs:%1, %0" : 234 "=r" (l) : 235 "m" 236 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 237 return l; 238} 239 240__inline static void __unused 241cpu_set_curpri(int pri) 242{ 243 244 __asm volatile( 245 "movl %1, %%gs:%0" : 246 "=m" (*(struct cpu_info *)offsetof(struct cpu_info, ci_schedstate.spc_curpriority)) : 247 "r" (pri) 248 ); 249} 250#else /* __GNUC__ && !_LKM */ 251/* For non-GCC and LKMs */ 252struct cpu_info *x86_curcpu(void); 253lwp_t *x86_curlwp(void); 254void cpu_set_curpri(int); 255#endif /* __GNUC__ && !_LKM */ 256 257#define cpu_number() (curcpu()->ci_cpuid) 258 259#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 260 261extern struct cpu_info *cpu_info[X86_MAXPROCS]; 262 263void cpu_boot_secondary_processors(void); 264void cpu_init_idle_lwps(void); 265 266#define X86_AST_GENERIC 0x01 267#define X86_AST_PREEMPT 0x02 268 269#define aston(l, why) ((l)->l_md.md_astpending |= (why)) 270#define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 271 272extern uint32_t cpus_attached; 273 274#define curcpu() x86_curcpu() 275#define curlwp x86_curlwp() 276#define curpcb (&curlwp->l_addr->u_pcb) 277 278/* 279 * Arguments to hardclock, softclock and statclock 280 * encapsulate the previous machine state in an opaque 281 * clockframe; for now, use generic intrframe. 282 */ 283struct clockframe { 284 struct intrframe cf_if; 285}; 286 287#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 288 (frame)->cf_if.if_tf.tf_rflags) 289#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 290#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 291 292/* 293 * This is used during profiling to integrate system time. It can safely 294 * assume that the process is resident. 295 */ 296#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 297 298/* 299 * Give a profiling tick to the current process when the user profiling 300 * buffer pages are invalid. On the i386, request an ast to send us 301 * through trap(), marking the proc as needing a profiling tick. 302 */ 303extern void cpu_need_proftick(struct lwp *); 304 305/* 306 * Notify an LWP that it has a signal pending, process as soon as possible. 307 */ 308extern void cpu_signotify(struct lwp *); 309 310/* 311 * We need a machine-independent name for this. 312 */ 313extern void (*delay_func)(unsigned int); 314 315#define DELAY(x) (*delay_func)(x) 316#define delay(x) (*delay_func)(x) 317 318 319/* 320 * pull in #defines for kinds of processors 321 */ 322 323extern int biosbasemem; 324extern int biosextmem; 325extern int cpu; 326extern int cpu_feature; 327extern int cpu_feature2; 328extern int cpu_id; 329extern int cpuid_level; 330extern char cpu_vendorname[]; 331 332extern void (*x86_cpu_idle)(void); 333#define cpu_idle() (*x86_cpu_idle)() 334 335/* identcpu.c */ 336 337void identifycpu(struct cpu_info *); 338void cpu_probe_features(struct cpu_info *); 339 340/* machdep.c */ 341void dumpconf(void); 342void cpu_reset(void); 343void x86_64_proc0_tss_ldt_init(void); 344void x86_64_init_pcb_tss_ldt(struct cpu_info *); 345void cpu_proc_fork(struct proc *, struct proc *); 346 347struct region_descriptor; 348void lgdt(struct region_descriptor *); 349#ifdef XEN 350void lgdt_finish(void); 351#endif 352void fillw(short, void *, size_t); 353 354struct pcb; 355void savectx(struct pcb *); 356void lwp_trampoline(void); 357void child_trampoline(void); 358 359#ifdef XEN 360void startrtclock(void); 361void xen_delay(unsigned int); 362void xen_initclocks(void); 363#else 364/* clock.c */ 365void initrtclock(u_long); 366void startrtclock(void); 367void i8254_delay(unsigned int); 368void i8254_initclocks(void); 369#endif 370 371void cpu_init_msrs(struct cpu_info *, bool); 372 373 374/* vm_machdep.c */ 375int kvtop(void *); 376 377/* trap.c */ 378void child_return(void *); 379 380/* consinit.c */ 381void kgdb_port_init(void); 382 383/* bus_machdep.c */ 384void x86_bus_space_init(void); 385void x86_bus_space_mallocok(void); 386 387#endif /* _KERNEL */ 388 389#include <machine/psl.h> 390 391/* 392 * CTL_MACHDEP definitions. 393 */ 394#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 395#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 396#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 397#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 398#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 399#define CPU_DISKINFO 6 /* disk geometry information */ 400#define CPU_FPU_PRESENT 7 /* FPU is present */ 401#define CPU_MAXID 8 /* number of valid machdep ids */ 402 403 404/* 405 * Structure for CPU_DISKINFO sysctl call. 406 * XXX this should be somewhere else. 407 */ 408#define MAX_BIOSDISKS 16 409 410struct disklist { 411 int dl_nbiosdisks; /* number of bios disks */ 412 struct biosdisk_info { 413 int bi_dev; /* BIOS device # (0x80 ..) */ 414 int bi_cyl; /* cylinders on disk */ 415 int bi_head; /* heads per track */ 416 int bi_sec; /* sectors per track */ 417 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 418#define BIFLAG_INVALID 0x01 419#define BIFLAG_EXTINT13 0x02 420 int bi_flags; 421 } dl_biosdisks[MAX_BIOSDISKS]; 422 423 int dl_nnativedisks; /* number of native disks */ 424 struct nativedisk_info { 425 char ni_devname[16]; /* native device name */ 426 int ni_nmatches; /* # of matches w/ BIOS */ 427 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 428 } dl_nativedisks[1]; /* actually longer */ 429}; 430 431#endif /* !_AMD64_CPU_H_ */ 432