meson_resets.c revision 1.3 
1/* $NetBSD: meson_resets.c,v 1.3 2021/01/01 07:15:18 ryo Exp $ */
2
3/*-
4 * Copyright (c) 2017-2019 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: meson_resets.c,v 1.3 2021/01/01 07:15:18 ryo Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/cpu.h>
35#include <sys/device.h>
36
37#include <dev/fdt/fdtvar.h>
38
39#include <dev/clk/clk_backend.h>
40
41#define	RESET_REG(index)	(((index) / 32) * 4)
42#define	RESET_MASK(index)	__BIT((index) % 32)
43
44#define	LEVEL_OFFSET		0x7c
45
46static const char * compatible[] = {
47	"amlogic,meson8b-reset",
48	"amlogic,meson-axg-reset",
49	"amlogic,meson-gxbb-reset",
50	NULL
51};
52
53struct meson_resets_softc {
54	device_t		sc_dev;
55	bus_space_tag_t		sc_bst;
56	bus_space_handle_t	sc_bsh;
57};
58
59#define	RESET_READ(sc, reg)		\
60	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
61#define	RESET_WRITE(sc, reg, val)	\
62	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
63
64static void *
65meson_resets_acquire(device_t dev, const void *data, size_t len)
66{
67	if (len != 4)
68		return NULL;
69
70	/* Specifier is an index. Just return it. */
71	return (void *)(uintptr_t)be32dec(data);
72}
73
74static void
75meson_resets_release(device_t dev, void *priv)
76{
77}
78
79static int
80meson_resets_assert(device_t dev, void *priv)
81{
82	struct meson_resets_softc * const sc = device_private(dev);
83	const uintptr_t index = (uintptr_t)priv;
84
85	const bus_size_t reset_reg = RESET_REG(index) + LEVEL_OFFSET;
86	const uint32_t reset_mask = RESET_MASK(index);
87
88	const uint32_t val = RESET_READ(sc, reset_reg);
89	RESET_WRITE(sc, reset_reg, val & ~reset_mask);
90
91	return 0;
92}
93
94static int
95meson_resets_deassert(device_t dev, void *priv)
96{
97	struct meson_resets_softc * const sc = device_private(dev);
98	const uintptr_t index = (uintptr_t)priv;
99
100	const bus_size_t reset_reg = RESET_REG(index) + LEVEL_OFFSET;
101	const uint32_t reset_mask = RESET_MASK(index);
102
103	const uint32_t val = RESET_READ(sc, reset_reg);
104	RESET_WRITE(sc, reset_reg, val | reset_mask);
105
106	return 0;
107}
108
109static const struct fdtbus_reset_controller_func meson_fdtreset_funcs = {
110	.acquire = meson_resets_acquire,
111	.release = meson_resets_release,
112	.reset_assert = meson_resets_assert,
113	.reset_deassert = meson_resets_deassert,
114};
115
116static int
117meson_resets_match(device_t parent, cfdata_t cf, void *aux)
118{
119	struct fdt_attach_args * const faa = aux;
120
121	return of_match_compatible(faa->faa_phandle, compatible);
122}
123
124static void
125meson_resets_attach(device_t parent, device_t self, void *aux)
126{
127	struct meson_resets_softc * const sc = device_private(self);
128	struct fdt_attach_args * const faa = aux;
129	const int phandle = faa->faa_phandle;
130	bus_addr_t addr;
131	bus_size_t size;
132
133	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
134		aprint_error(": couldn't get registers\n");
135		return;
136	}
137
138	sc->sc_dev = self;
139	sc->sc_bst = faa->faa_bst;
140	if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
141		aprint_error(": couldn't map registers\n");
142		return;
143	}
144
145	aprint_naive("\n");
146	aprint_normal("\n");
147
148	fdtbus_register_reset_controller(sc->sc_dev, phandle,
149	    &meson_fdtreset_funcs);
150}
151
152CFATTACH_DECL_NEW(meson_resets, sizeof(struct meson_resets_softc),
153    meson_resets_match, meson_resets_attach, NULL, NULL);
154