sun8i-h3-nanopi-neo.dts revision 1.2 
11.2Sjmcneill/* $NetBSD: sun8i-h3-nanopi-neo.dts,v 1.2 2017/10/05 13:25:33 jmcneill Exp $ */
21.1Sjmcneill
31.1Sjmcneill/*-
41.1Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
51.1Sjmcneill * All rights reserved.
61.1Sjmcneill *
71.1Sjmcneill * Redistribution and use in source and binary forms, with or without
81.1Sjmcneill * modification, are permitted provided that the following conditions
91.1Sjmcneill * are met:
101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright
111.1Sjmcneill *    notice, this list of conditions and the following disclaimer.
121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
131.1Sjmcneill *    notice, this list of conditions and the following disclaimer in the
141.1Sjmcneill *    documentation and/or other materials provided with the distribution.
151.1Sjmcneill *
161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
261.1Sjmcneill * SUCH DAMAGE.
271.1Sjmcneill */
281.1Sjmcneill
291.1Sjmcneill#include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts"
301.1Sjmcneill#include "sun8i-h3.dtsi"
311.1Sjmcneill
321.2Sjmcneill/ {
331.2Sjmcneill	cpus {
341.2Sjmcneill		cpu@0 {
351.2Sjmcneill			cpu-supply = <&vdd_cpu>;
361.2Sjmcneill			operating-points = <
371.2Sjmcneill				/* kHz	  uV */
381.2Sjmcneill				1008000	1300000
391.2Sjmcneill				816000	1100000
401.2Sjmcneill				480000	1100000
411.2Sjmcneill				>;
421.2Sjmcneill		};
431.2Sjmcneill	};
441.2Sjmcneill
451.2Sjmcneill	vdd_cpu: reg_cpux_vset {
461.2Sjmcneill		compatible = "regulator-gpio";
471.2Sjmcneill
481.2Sjmcneill		regulator-name = "cpux-supply";
491.2Sjmcneill		regulator-min-microvolt = <1100000>;
501.2Sjmcneill		regulator-max-microvolt = <1300000>;
511.2Sjmcneill		regulator-boot-on;
521.2Sjmcneill
531.2Sjmcneill		gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;	/* GPIOL6 */
541.2Sjmcneill		states = <1300000 0x1
551.2Sjmcneill			  1100000 0x0>;
561.2Sjmcneill
571.2Sjmcneill		enable-active-high;
581.2Sjmcneill	};
591.2Sjmcneill};
601.2Sjmcneill
611.1Sjmcneill&emac {
621.1Sjmcneill	phy-mode = "mii";
631.1Sjmcneill	phy = <&phy1>;
641.1Sjmcneill
651.1Sjmcneill	allwinner,use-internal-phy;
661.1Sjmcneill	allwinner,leds-active-low;
671.1Sjmcneill	status = "okay";
681.1Sjmcneill
691.1Sjmcneill	phy1: ethernet-phy@1 {
701.1Sjmcneill		reg = <1>;
711.1Sjmcneill	};
721.1Sjmcneill};
73